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<div class="header">
  <div class="headertitle"><div class="title">trcHardwarePort.h</div></div>
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<div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span><span class="comment">/*</span></div>
<div class="line"><a id="l00002" name="l00002"></a><span class="lineno">    2</span><span class="comment"> * Trace Recorder for Tracealyzer v4.10.3</span></div>
<div class="line"><a id="l00003" name="l00003"></a><span class="lineno">    3</span><span class="comment"> * Copyright 2023 Percepio AB</span></div>
<div class="line"><a id="l00004" name="l00004"></a><span class="lineno">    4</span><span class="comment"> * www.percepio.com</span></div>
<div class="line"><a id="l00005" name="l00005"></a><span class="lineno">    5</span><span class="comment"> *</span></div>
<div class="line"><a id="l00006" name="l00006"></a><span class="lineno">    6</span><span class="comment"> * SPDX-License-Identifier: Apache-2.0</span></div>
<div class="line"><a id="l00007" name="l00007"></a><span class="lineno">    7</span><span class="comment"> *</span></div>
<div class="line"><a id="l00008" name="l00008"></a><span class="lineno">    8</span><span class="comment"> * The hardware abstraction layer for the trace recorder.</span></div>
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno">    9</span><span class="comment"> */</span></div>
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno">   10</span> </div>
<div class="line"><a id="l00011" name="l00011"></a><span class="lineno">   11</span><span class="preprocessor">#ifndef TRC_HARDWARE_PORT_H</span></div>
<div class="line"><a id="l00012" name="l00012"></a><span class="lineno">   12</span><span class="preprocessor">#define TRC_HARDWARE_PORT_H</span></div>
<div class="line"><a id="l00013" name="l00013"></a><span class="lineno">   13</span> </div>
<div class="line"><a id="l00014" name="l00014"></a><span class="lineno">   14</span><span class="preprocessor">#include &lt;trcDefines.h&gt;</span></div>
<div class="line"><a id="l00015" name="l00015"></a><span class="lineno">   15</span> </div>
<div class="line"><a id="l00016" name="l00016"></a><span class="lineno">   16</span><span class="comment">/*</span></div>
<div class="line"><a id="l00017" name="l00017"></a><span class="lineno">   17</span><span class="comment"> * @brief</span></div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span><span class="comment"> * This macro must be used as name for the variable in the critical section allocation.</span></div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="comment"> * Example: #define TRACE_ALLOC_CRITICAL_SECTION uint32_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="comment"> */</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="preprocessor">#define TRACE_ALLOC_CRITICAL_SECTION_NAME xTraceCriticalSectionStatus</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span> </div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span><span class="preprocessor">#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_NOT_SET)</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span><span class="preprocessor">    #error &quot;TRC_CFG_HARDWARE_PORT not selected - see trcConfig.h&quot;</span></div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno">   26</span> </div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno">   27</span><span class="comment">/*******************************************************************************</span></div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno">   28</span><span class="comment"> * TRC_IRQ_PRIORITY_ORDER</span></div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno">   29</span><span class="comment"> *</span></div>
<div class="line"><a id="l00030" name="l00030"></a><span class="lineno">   30</span><span class="comment"> * Macro which should be defined as an integer of 0 or 1.</span></div>
<div class="line"><a id="l00031" name="l00031"></a><span class="lineno">   31</span><span class="comment"> *</span></div>
<div class="line"><a id="l00032" name="l00032"></a><span class="lineno">   32</span><span class="comment"> * This should be 0 if lower IRQ priority values implies higher priority</span></div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno">   33</span><span class="comment"> * levels, such as on ARM Cortex M. If the opposite scheme is used, i.e.,</span></div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno">   34</span><span class="comment"> * if higher IRQ priority values means higher priority, this should be 1.</span></div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno">   35</span><span class="comment"> *</span></div>
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno">   36</span><span class="comment"> * This setting is not critical. It is used only to sort and colorize the</span></div>
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno">   37</span><span class="comment"> * interrupts in priority order, in case you record interrupts using</span></div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno">   38</span><span class="comment"> * the vTraceStoreISRBegin and vTraceStoreISREnd routines.</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span><span class="comment"> *</span></div>
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno">   40</span><span class="comment"> ******************************************************************************</span></div>
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno">   41</span><span class="comment"> *</span></div>
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno">   42</span><span class="comment"> * HWTC Macros</span></div>
<div class="line"><a id="l00043" name="l00043"></a><span class="lineno">   43</span><span class="comment"> *</span></div>
<div class="line"><a id="l00044" name="l00044"></a><span class="lineno">   44</span><span class="comment"> * These macros provides a hardware isolation layer representing the</span></div>
<div class="line"><a id="l00045" name="l00045"></a><span class="lineno">   45</span><span class="comment"> * hardware timer/counter used for the event timestamping.</span></div>
<div class="line"><a id="l00046" name="l00046"></a><span class="lineno">   46</span><span class="comment"> *</span></div>
<div class="line"><a id="l00047" name="l00047"></a><span class="lineno">   47</span><span class="comment"> * TRC_HWTC_COUNT: How to read the current value of the timer/counter.</span></div>
<div class="line"><a id="l00048" name="l00048"></a><span class="lineno">   48</span><span class="comment"> *</span></div>
<div class="line"><a id="l00049" name="l00049"></a><span class="lineno">   49</span><span class="comment"> * TRC_HWTC_TYPE: Tells the type of timer/counter used for TRC_HWTC_COUNT:</span></div>
<div class="line"><a id="l00050" name="l00050"></a><span class="lineno">   50</span><span class="comment"> *</span></div>
<div class="line"><a id="l00051" name="l00051"></a><span class="lineno">   51</span><span class="comment"> * - TRC_FREE_RUNNING_32BIT_INCR:</span></div>
<div class="line"><a id="l00052" name="l00052"></a><span class="lineno">   52</span><span class="comment"> *   Free-running 32-bit timer/counter, counting upwards from 0.</span></div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno">   53</span><span class="comment"> *</span></div>
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno">   54</span><span class="comment"> * - TRC_FREE_RUNNING_32BIT_DECR</span></div>
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno">   55</span><span class="comment"> *   Free-running 32-bit timer/counter, counting downwards from 0xFFFFFFFF.</span></div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno">   56</span><span class="comment"> *</span></div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno">   57</span><span class="comment"> * - TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno">   58</span><span class="comment"> *   Periodic timer that drives the OS tick interrupt, counting upwards</span></div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno">   59</span><span class="comment"> *   from 0 until (TRC_HWTC_PERIOD-1).</span></div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno">   60</span><span class="comment"> *</span></div>
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno">   61</span><span class="comment"> * - TRC_OS_TIMER_DECR</span></div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno">   62</span><span class="comment"> *   Periodic timer that drives the OS tick interrupt, counting downwards</span></div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno">   63</span><span class="comment"> *   from TRC_HWTC_PERIOD-1 until 0.</span></div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno">   64</span><span class="comment"> *</span></div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno">   65</span><span class="comment"> * - TRC_CUSTOM_TIMER_INCR</span></div>
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno">   66</span><span class="comment"> *   A custom timer or counter independent of the OS tick, counting</span></div>
<div class="line"><a id="l00067" name="l00067"></a><span class="lineno">   67</span><span class="comment"> *   downwards from TRC_HWTC_PERIOD-1 until 0. (Currently only supported</span></div>
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno">   68</span><span class="comment"> *   in streaming mode).</span></div>
<div class="line"><a id="l00069" name="l00069"></a><span class="lineno">   69</span><span class="comment"> *</span></div>
<div class="line"><a id="l00070" name="l00070"></a><span class="lineno">   70</span><span class="comment"> * - TRC_CUSTOM_TIMER_DECR</span></div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno">   71</span><span class="comment"> *   A custom timer independent of the OS tick, counting downwards</span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno">   72</span><span class="comment"> *   from TRC_HWTC_PERIOD-1 until 0. (Currently only supported</span></div>
<div class="line"><a id="l00073" name="l00073"></a><span class="lineno">   73</span><span class="comment"> *   in streaming mode).</span></div>
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno">   74</span><span class="comment"> *</span></div>
<div class="line"><a id="l00075" name="l00075"></a><span class="lineno">   75</span><span class="comment"> * TRC_HWTC_PERIOD: The number of HWTC_COUNT ticks until the timer wraps</span></div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno">   76</span><span class="comment"> * around. If using TRC_FREE_RUNNING_32BIT_INCR/DECR, this should be 0. </span></div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno">   77</span><span class="comment"> *</span></div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno">   78</span><span class="comment"> * TRC_HWTC_FREQ_HZ: The clock rate of the TRC_HWTC_COUNT counter in Hz. If using </span></div>
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno">   79</span><span class="comment"> * TRC_OS_TIMER_INCR/DECR, this is should be TRC_HWTC_PERIOD * TRC_TICK_RATE_HZ.</span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno">   80</span><span class="comment"> * If using a free-running timer, this is often TRACE_CPU_CLOCK_HZ (if running at</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno">   81</span><span class="comment"> * the core clock rate). If using TRC_CUSTOM_TIMER_INCR/DECR, this should match</span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno">   82</span><span class="comment"> * the clock rate of your custom timer (i.e., TRC_HWTC_COUNT). If the default value</span></div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno">   83</span><span class="comment"> * of TRC_HWTC_FREQ_HZ is incorrect for your setup, you can override it by calling</span></div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno">   84</span><span class="comment"> * vTraceSetFrequency before calling vTraceEnable.</span></div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno">   85</span><span class="comment"> *</span></div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno">   86</span><span class="comment"> * TRC_HWTC_DIVISOR (used in snapshot mode only):</span></div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno">   87</span><span class="comment"> * In snapshot mode, the timestamp resolution is TRC_HWTC_FREQ_HZ/TRC_HWTC_DIVISOR.</span></div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno">   88</span><span class="comment"> * If the timer frequency is very high (hundreds of MHz), we recommend increasing</span></div>
<div class="line"><a id="l00089" name="l00089"></a><span class="lineno">   89</span><span class="comment"> * the TRC_HWTC_DIVISOR prescaler, to reduce the bandwidth needed to store</span></div>
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno">   90</span><span class="comment"> * timestamps. This since extra &quot;XTS&quot; events are inserted if the time since the</span></div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno">   91</span><span class="comment"> * previous event exceeds a certain limit (255 or 65535 depending on event type).</span></div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno">   92</span><span class="comment"> * It is advised to keep the time between most events below 65535 native ticks</span></div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno">   93</span><span class="comment"> * (after division by TRC_HWTC_DIVISOR) to avoid frequent XTS events.</span></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno">   94</span><span class="comment"> ******************************************************************************/</span></div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno">   95</span> </div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno">   96</span><span class="preprocessor">#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_NOT_SET)</span></div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno">   97</span><span class="preprocessor">    #error &quot;TRC_CFG_HARDWARE_PORT not selected - see trcConfig.h&quot;</span></div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno">   98</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno">   99</span> </div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno">  100</span><span class="preprocessor">#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Win32)</span></div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno">  101</span><span class="comment">/* This can be used as a template for any free-running 32-bit counter */</span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span><span class="keywordtype">void</span> vTraceTimerReset(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno">  103</span>uint32_t uiTraceTimerGetFrequency(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno">  104</span>uint32_t uiTraceTimerGetValue(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span> </div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno">  106</span><span class="preprocessor">#define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno">  107</span><span class="preprocessor">#define TRC_HWTC_COUNT ((TraceUnsignedBaseType_t)uiTraceTimerGetValue())</span></div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno">  108</span><span class="preprocessor">#define TRC_HWTC_PERIOD 0</span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno">  109</span><span class="preprocessor">#define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno">  110</span><span class="preprocessor">#define TRC_HWTC_FREQ_HZ ((TraceUnsignedBaseType_t)uiTraceTimerGetFrequency())</span></div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span> </div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno">  112</span><span class="preprocessor">#define TRC_IRQ_PRIORITY_ORDER 1</span></div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno">  113</span> </div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno">  114</span><span class="preprocessor">#define TRC_PORT_SPECIFIC_INIT() vTraceTimerReset()</span></div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno">  115</span> </div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno">  116</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Win64)</span></div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno">  117</span><span class="comment">/* This can be used as a template for any free-running 32-bit counter */</span></div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span><span class="keywordtype">void</span> vTraceTimerReset(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno">  119</span>uint32_t uiTraceTimerGetFrequency(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno">  120</span>uint32_t uiTraceTimerGetValue(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno">  121</span> </div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno">  122</span><span class="preprocessor">#define TRC_BASE_TYPE int64_t</span></div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span> </div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno">  124</span><span class="preprocessor">#define TRC_UNSIGNED_BASE_TYPE uint64_t</span></div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno">  125</span> </div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno">  126</span><span class="preprocessor">#define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno">  127</span><span class="preprocessor">#define TRC_HWTC_COUNT ((TraceUnsignedBaseType_t)uiTraceTimerGetValue())</span></div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno">  128</span><span class="preprocessor">#define TRC_HWTC_PERIOD 0</span></div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno">  129</span><span class="preprocessor">#define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span><span class="preprocessor">#define TRC_HWTC_FREQ_HZ ((TraceUnsignedBaseType_t)uiTraceTimerGetFrequency())</span></div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno">  131</span> </div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span><span class="preprocessor">#define TRC_IRQ_PRIORITY_ORDER 1</span></div>
<div class="line"><a id="l00133" name="l00133"></a><span class="lineno">  133</span> </div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno">  134</span><span class="preprocessor">#define TRC_PORT_SPECIFIC_INIT() vTraceTimerReset()</span></div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno">  135</span> </div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_HWIndependent)</span></div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno">  137</span>    <span class="comment">/* Timestamping by OS tick only (typically 1 ms resolution) */</span></div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno">  139</span><span class="preprocessor">    #define TRC_HWTC_COUNT 0</span></div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno">  140</span><span class="preprocessor">    #define TRC_HWTC_PERIOD 1</span></div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno">  141</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ TRC_TICK_RATE_HZ</span></div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno">  143</span> </div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno">  144</span>    <span class="comment">/* Set the meaning of IRQ priorities in ISR tracing - see above */</span></div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER NOT_SET</span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span> </div>
<div class="line"><a id="l00147" name="l00147"></a><span class="lineno">  147</span><span class="comment">/* This hardware port is deprecated and should not be used due to the low timer accuracy. */</span></div>
<div class="line"><a id="l00148" name="l00148"></a><span class="lineno">  148</span><span class="preprocessor">#error TRC_HARDWARE_PORT_HWIndependent is deprecated</span></div>
<div class="line"><a id="l00149" name="l00149"></a><span class="lineno">  149</span> </div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span><span class="preprocessor">#elif ((TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_Cortex_M) || (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_Cortex_M_NRF_SD))</span></div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno">  151</span>    </div>
<div class="line"><a id="l00152" name="l00152"></a><span class="lineno">  152</span><span class="preprocessor">    #ifndef __CORTEX_M</span></div>
<div class="line"><a id="l00153" name="l00153"></a><span class="lineno">  153</span><span class="preprocessor">    #error &quot;Can&#39;t find the CMSIS API. Please include your processor&#39;s header file in trcConfig.h&quot;</span>   </div>
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno">  154</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span> </div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno">  156</span><span class="preprocessor">#if (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_Cortex_M)</span></div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceUnsignedBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno">  158</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() {TRACE_ALLOC_CRITICAL_SECTION_NAME = __get_PRIMASK(); __set_PRIMASK(1);} </span><span class="comment">/* PRIMASK disables ALL interrupts - allows for tracing in any ISR */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() {__set_PRIMASK(TRACE_ALLOC_CRITICAL_SECTION_NAME);}</span></div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span><span class="preprocessor">        #include &quot;nrf_nvic.h&quot;</span></div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno">  162</span><span class="preprocessor">        #define TRACE_ALLOC_CRITICAL_SECTION() TraceUnsignedBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span><span class="preprocessor">        #define TRACE_ENTER_CRITICAL_SECTION() {(void) sd_nvic_critical_region_enter((uint8_t*)&amp;TRACE_ALLOC_CRITICAL_SECTION_NAME);}</span></div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno">  164</span><span class="preprocessor">        #define TRACE_EXIT_CRITICAL_SECTION() {(void) sd_nvic_critical_region_exit((uint8_t)TRACE_ALLOC_CRITICAL_SECTION_NAME);}</span></div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno">  165</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span> </div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span><span class="comment">    /**************************************************************************</span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span><span class="comment">    * For Cortex-M3, M4 and M7, the DWT cycle counter is used for timestamping.</span></div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span><span class="comment">    * For Cortex-M0 and M0+, the SysTick timer is used since DWT is not</span></div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span><span class="comment">    * available. Systick timestamping can also be forced on Cortex-M3, M4 and</span></div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span><span class="comment">    * M7 by defining the preprocessor directive TRC_CFG_ARM_CM_USE_SYSTICK,</span></div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno">  172</span><span class="comment">    * either directly below or in trcConfig.h.</span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span><span class="comment">    *</span></div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span><span class="comment">    * #define TRC_CFG_ARM_CM_USE_SYSTICK</span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span><span class="comment">    **************************************************************************/</span></div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span> </div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno">  177</span><span class="preprocessor">    #if ((__CORTEX_M &gt;= 0x03) &amp;&amp; (! defined TRC_CFG_ARM_CM_USE_SYSTICK))</span></div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno">  178</span>        </div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span>        <span class="keywordtype">void</span> xTraceHardwarePortInitCortexM(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno">  180</span> </div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno">  181</span><span class="preprocessor">        #define TRC_REG_DEMCR (*(volatile uint32_t*)0xE000EDFC)</span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span><span class="preprocessor">        #define TRC_REG_DWT_CTRL (*(volatile uint32_t*)0xE0001000)</span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span><span class="preprocessor">        #define TRC_REG_DWT_CYCCNT (*(volatile uint32_t*)0xE0001004)</span></div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno">  184</span><span class="preprocessor">        #define TRC_REG_DWT_EXCCNT (*(volatile uint32_t*)0xE000100C)</span></div>
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno">  185</span> </div>
<div class="line"><a id="l00186" name="l00186"></a><span class="lineno">  186</span><span class="preprocessor">        #define TRC_REG_ITM_LOCKACCESS (*(volatile uint32_t*)0xE0001FB0)        </span></div>
<div class="line"><a id="l00187" name="l00187"></a><span class="lineno">  187</span><span class="preprocessor">        #define TRC_ITM_LOCKACCESS_UNLOCK (0xC5ACCE55)</span></div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span>        </div>
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno">  189</span>        <span class="comment">/* Bit mask for TRCENA bit in DEMCR - Global enable for DWT and ITM */</span></div>
<div class="line"><a id="l00190" name="l00190"></a><span class="lineno">  190</span><span class="preprocessor">        #define TRC_DEMCR_TRCENA (1 &lt;&lt; 24)</span></div>
<div class="line"><a id="l00191" name="l00191"></a><span class="lineno">  191</span> </div>
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno">  192</span>        <span class="comment">/* Bit mask for NOPRFCNT bit in DWT_CTRL. If 1, DWT_EXCCNT is not supported */</span></div>
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno">  193</span><span class="preprocessor">        #define TRC_DWT_CTRL_NOPRFCNT (1 &lt;&lt; 24)</span></div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno">  194</span> </div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span>        <span class="comment">/* Bit mask for NOCYCCNT bit in DWT_CTRL. If 1, DWT_CYCCNT is not supported */</span></div>
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno">  196</span><span class="preprocessor">        #define TRC_DWT_CTRL_NOCYCCNT (1 &lt;&lt; 25)</span></div>
<div class="line"><a id="l00197" name="l00197"></a><span class="lineno">  197</span> </div>
<div class="line"><a id="l00198" name="l00198"></a><span class="lineno">  198</span>        <span class="comment">/* Bit mask for EXCEVTENA_ bit in DWT_CTRL. Set to 1 to enable DWT_EXCCNT */</span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span><span class="preprocessor">        #define TRC_DWT_CTRL_EXCEVTENA (1 &lt;&lt; 18)</span></div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span> </div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno">  201</span>        <span class="comment">/* Bit mask for EXCEVTENA_ bit in DWT_CTRL. Set to 1 to enable DWT_CYCCNT */</span></div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno">  202</span><span class="preprocessor">        #define TRC_DWT_CTRL_CYCCNTENA (1)</span></div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno">  203</span> </div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno">  204</span><span class="preprocessor">        #define TRC_PORT_SPECIFIC_INIT() xTraceHardwarePortInitCortexM()</span></div>
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno">  205</span> </div>
<div class="line"><a id="l00206" name="l00206"></a><span class="lineno">  206</span><span class="preprocessor">        #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00207" name="l00207"></a><span class="lineno">  207</span><span class="preprocessor">        #define TRC_HWTC_COUNT TRC_REG_DWT_CYCCNT</span></div>
<div class="line"><a id="l00208" name="l00208"></a><span class="lineno">  208</span><span class="preprocessor">        #define TRC_HWTC_PERIOD 0</span></div>
<div class="line"><a id="l00209" name="l00209"></a><span class="lineno">  209</span><span class="preprocessor">        #define TRC_HWTC_DIVISOR 4</span></div>
<div class="line"><a id="l00210" name="l00210"></a><span class="lineno">  210</span><span class="preprocessor">        #define TRC_HWTC_FREQ_HZ TRACE_CPU_CLOCK_HZ</span></div>
<div class="line"><a id="l00211" name="l00211"></a><span class="lineno">  211</span><span class="preprocessor">        #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00212" name="l00212"></a><span class="lineno">  212</span>    </div>
<div class="line"><a id="l00213" name="l00213"></a><span class="lineno">  213</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00214" name="l00214"></a><span class="lineno">  214</span>        <span class="comment">/* Uses the lower bits of the 64-bit free running timer in the RP2040. SysTick can not be used since it is different for both cores. */</span></div>
<div class="line"><a id="l00215" name="l00215"></a><span class="lineno">  215</span><span class="preprocessor">        #if defined(_CMSIS_RP2040_H_) || defined(RP2040_H)</span></div>
<div class="line"><a id="l00216" name="l00216"></a><span class="lineno">  216</span><span class="preprocessor">            #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00217" name="l00217"></a><span class="lineno">  217</span><span class="preprocessor">            #define TRC_HWTC_COUNT (*((volatile uint32_t*)0x4005400c))</span></div>
<div class="line"><a id="l00218" name="l00218"></a><span class="lineno">  218</span><span class="preprocessor">            #define TRC_HWTC_PERIOD 0</span></div>
<div class="line"><a id="l00219" name="l00219"></a><span class="lineno">  219</span><span class="preprocessor">            #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno">  220</span><span class="preprocessor">            #define TRC_HWTC_FREQ_HZ 1000000</span></div>
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno">  221</span><span class="preprocessor">            #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00222" name="l00222"></a><span class="lineno">  222</span><span class="preprocessor">        #else   </span></div>
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno">  223</span><span class="preprocessor">            #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR</span></div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno">  224</span><span class="preprocessor">            #define TRC_HWTC_COUNT (*((volatile uint32_t*)0xE000E018))</span></div>
<div class="line"><a id="l00225" name="l00225"></a><span class="lineno">  225</span><span class="preprocessor">            #define TRC_HWTC_PERIOD ((*((volatile uint32_t*)0xE000E014)) + 1)</span></div>
<div class="line"><a id="l00226" name="l00226"></a><span class="lineno">  226</span><span class="preprocessor">            #define TRC_HWTC_DIVISOR 4</span></div>
<div class="line"><a id="l00227" name="l00227"></a><span class="lineno">  227</span><span class="preprocessor">            #define TRC_HWTC_FREQ_HZ TRACE_CPU_CLOCK_HZ</span></div>
<div class="line"><a id="l00228" name="l00228"></a><span class="lineno">  228</span><span class="preprocessor">            #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00229" name="l00229"></a><span class="lineno">  229</span><span class="preprocessor">        #endif</span></div>
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno">  230</span>    </div>
<div class="line"><a id="l00231" name="l00231"></a><span class="lineno">  231</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00232" name="l00232"></a><span class="lineno">  232</span> </div>
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno">  233</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Renesas_RX600)</span></div>
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno">  234</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00235" name="l00235"></a><span class="lineno">  235</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() { TRACE_ALLOC_CRITICAL_SECTION_NAME = TRC_KERNEL_PORT_SET_INTERRUPT_MASK(); }</span></div>
<div class="line"><a id="l00236" name="l00236"></a><span class="lineno">  236</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() { TRC_KERNEL_PORT_CLEAR_INTERRUPT_MASK(TRACE_ALLOC_CRITICAL_SECTION_NAME); }</span></div>
<div class="line"><a id="l00237" name="l00237"></a><span class="lineno">  237</span> </div>
<div class="line"><a id="l00238" name="l00238"></a><span class="lineno">  238</span><span class="preprocessor">    #include &lt;iodefine.h&gt;</span></div>
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno">  239</span> </div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno">  240</span><span class="preprocessor">    #if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING)  </span></div>
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno">  241</span>        </div>
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno">  242</span><span class="preprocessor">        #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00243" name="l00243"></a><span class="lineno">  243</span><span class="preprocessor">        #define TRC_HWTC_COUNT (CMT0.CMCNT)</span></div>
<div class="line"><a id="l00244" name="l00244"></a><span class="lineno">  244</span>        </div>
<div class="line"><a id="l00245" name="l00245"></a><span class="lineno">  245</span><span class="preprocessor">    #elif (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT)</span></div>
<div class="line"><a id="l00246" name="l00246"></a><span class="lineno">  246</span>        </div>
<div class="line"><a id="l00247" name="l00247"></a><span class="lineno">  247</span>        <span class="comment">/* Decreasing counters better for Tickless Idle? */</span></div>
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span><span class="preprocessor">        #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR</span></div>
<div class="line"><a id="l00249" name="l00249"></a><span class="lineno">  249</span><span class="preprocessor">        #define TRC_HWTC_COUNT (CMT0.CMCOR - CMT0.CMCNT)</span></div>
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span>    </div>
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno">  251</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno">  252</span>    </div>
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno">  253</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (CMT0.CMCOR + 1)</span></div>
<div class="line"><a id="l00254" name="l00254"></a><span class="lineno">  254</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00255" name="l00255"></a><span class="lineno">  255</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00256" name="l00256"></a><span class="lineno">  256</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 1 </span></div>
<div class="line"><a id="l00257" name="l00257"></a><span class="lineno">  257</span>    </div>
<div class="line"><a id="l00258" name="l00258"></a><span class="lineno">  258</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_MICROCHIP_PIC24_PIC32)</span></div>
<div class="line"><a id="l00259" name="l00259"></a><span class="lineno">  259</span>    </div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() { TRACE_ALLOC_CRITICAL_SECTION_NAME = TRC_KERNEL_PORT_SET_INTERRUPT_MASK(); }</span></div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() { TRC_KERNEL_PORT_CLEAR_INTERRUPT_MASK(TRACE_ALLOC_CRITICAL_SECTION_NAME); }</span></div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno">  263</span>    </div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno">  264</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno">  265</span><span class="preprocessor">    #define TRC_HWTC_COUNT (TMR1)</span></div>
<div class="line"><a id="l00266" name="l00266"></a><span class="lineno">  266</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (PR1 + 1)</span></div>
<div class="line"><a id="l00267" name="l00267"></a><span class="lineno">  267</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00268" name="l00268"></a><span class="lineno">  268</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00269" name="l00269"></a><span class="lineno">  269</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 1</span></div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno">  270</span> </div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno">  271</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_TMS570_RM48)</span></div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span> </div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span><span class="preprocessor">    #define TRC_RTIFRC0 *((uint32_t *)0xFFFFFC10)</span></div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span><span class="preprocessor">    #define TRC_RTICOMP0 *((uint32_t *)0xFFFFFC50)</span></div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span><span class="preprocessor">    #define TRC_RTIUDCP0 *((uint32_t *)0xFFFFFC54)</span></div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno">  276</span>    </div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno">  277</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00278" name="l00278"></a><span class="lineno">  278</span><span class="preprocessor">    #define TRC_HWTC_COUNT (TRC_RTIFRC0 - (TRC_RTICOMP0 - TRC_RTIUDCP0))</span></div>
<div class="line"><a id="l00279" name="l00279"></a><span class="lineno">  279</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (TRC_RTIUDCP0)</span></div>
<div class="line"><a id="l00280" name="l00280"></a><span class="lineno">  280</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00281" name="l00281"></a><span class="lineno">  281</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00282" name="l00282"></a><span class="lineno">  282</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00283" name="l00283"></a><span class="lineno">  283</span> </div>
<div class="line"><a id="l00284" name="l00284"></a><span class="lineno">  284</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Atmel_AT91SAM7)</span></div>
<div class="line"><a id="l00285" name="l00285"></a><span class="lineno">  285</span> </div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span>    <span class="comment">/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */</span></div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span> </div>
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno">  288</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00289" name="l00289"></a><span class="lineno">  289</span><span class="preprocessor">    #define TRC_HWTC_COUNT ((uint32_t)(AT91C_BASE_PITC-&gt;PITC_PIIR &amp; 0xFFFFF))</span></div>
<div class="line"><a id="l00290" name="l00290"></a><span class="lineno">  290</span><span class="preprocessor">    #define TRC_HWTC_PERIOD ((uint32_t)(AT91C_BASE_PITC-&gt;PITC_PIMR + 1))</span></div>
<div class="line"><a id="l00291" name="l00291"></a><span class="lineno">  291</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00292" name="l00292"></a><span class="lineno">  292</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00293" name="l00293"></a><span class="lineno">  293</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 1</span></div>
<div class="line"><a id="l00294" name="l00294"></a><span class="lineno">  294</span> </div>
<div class="line"><a id="l00295" name="l00295"></a><span class="lineno">  295</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Atmel_UC3A0)</span></div>
<div class="line"><a id="l00296" name="l00296"></a><span class="lineno">  296</span> </div>
<div class="line"><a id="l00297" name="l00297"></a><span class="lineno">  297</span>    <span class="comment">/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO*/</span></div>
<div class="line"><a id="l00298" name="l00298"></a><span class="lineno">  298</span>    </div>
<div class="line"><a id="l00299" name="l00299"></a><span class="lineno">  299</span>    <span class="comment">/* For Atmel AVR32 (AT32UC3A) */</span></div>
<div class="line"><a id="l00300" name="l00300"></a><span class="lineno">  300</span> </div>
<div class="line"><a id="l00301" name="l00301"></a><span class="lineno">  301</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00302" name="l00302"></a><span class="lineno">  302</span><span class="preprocessor">    #define TRC_HWTC_COUNT ((uint32_t)sysreg_read(AVR32_COUNT))</span></div>
<div class="line"><a id="l00303" name="l00303"></a><span class="lineno">  303</span><span class="preprocessor">    #define TRC_HWTC_PERIOD ((uint32_t)(sysreg_read(AVR32_COMPARE) + 1))</span></div>
<div class="line"><a id="l00304" name="l00304"></a><span class="lineno">  304</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00305" name="l00305"></a><span class="lineno">  305</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00306" name="l00306"></a><span class="lineno">  306</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 1</span></div>
<div class="line"><a id="l00307" name="l00307"></a><span class="lineno">  307</span> </div>
<div class="line"><a id="l00308" name="l00308"></a><span class="lineno">  308</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_NXP_LPC210X)</span></div>
<div class="line"><a id="l00309" name="l00309"></a><span class="lineno">  309</span> </div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno">  310</span>    <span class="comment">/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */</span></div>
<div class="line"><a id="l00311" name="l00311"></a><span class="lineno">  311</span>    </div>
<div class="line"><a id="l00312" name="l00312"></a><span class="lineno">  312</span>    <span class="comment">/* Tested with LPC2106, but should work with most LPC21XX chips. */</span></div>
<div class="line"><a id="l00313" name="l00313"></a><span class="lineno">  313</span> </div>
<div class="line"><a id="l00314" name="l00314"></a><span class="lineno">  314</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00315" name="l00315"></a><span class="lineno">  315</span><span class="preprocessor">    #define TRC_HWTC_COUNT *((uint32_t *)0xE0004008 )</span></div>
<div class="line"><a id="l00316" name="l00316"></a><span class="lineno">  316</span><span class="preprocessor">    #define TRC_HWTC_PERIOD *((uint32_t *)0xE0004018 )</span></div>
<div class="line"><a id="l00317" name="l00317"></a><span class="lineno">  317</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00318" name="l00318"></a><span class="lineno">  318</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00319" name="l00319"></a><span class="lineno">  319</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00320" name="l00320"></a><span class="lineno">  320</span> </div>
<div class="line"><a id="l00321" name="l00321"></a><span class="lineno">  321</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_TEXAS_INSTRUMENTS_MSP430)</span></div>
<div class="line"><a id="l00322" name="l00322"></a><span class="lineno">  322</span> </div>
<div class="line"><a id="l00323" name="l00323"></a><span class="lineno">  323</span>    <span class="comment">/* UNOFFICIAL PORT - NOT YET VERIFIED */</span></div>
<div class="line"><a id="l00324" name="l00324"></a><span class="lineno">  324</span>    </div>
<div class="line"><a id="l00325" name="l00325"></a><span class="lineno">  325</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00326" name="l00326"></a><span class="lineno">  326</span><span class="preprocessor">    #define TRC_HWTC_COUNT (TA0R)</span></div>
<div class="line"><a id="l00327" name="l00327"></a><span class="lineno">  327</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (((uint16_t)TACCR0)+1)</span></div>
<div class="line"><a id="l00328" name="l00328"></a><span class="lineno">  328</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00329" name="l00329"></a><span class="lineno">  329</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno">  330</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 1</span></div>
<div class="line"><a id="l00331" name="l00331"></a><span class="lineno">  331</span> </div>
<div class="line"><a id="l00332" name="l00332"></a><span class="lineno">  332</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_PPC405)</span></div>
<div class="line"><a id="l00333" name="l00333"></a><span class="lineno">  333</span> </div>
<div class="line"><a id="l00334" name="l00334"></a><span class="lineno">  334</span>    <span class="comment">/* UNOFFICIAL PORT - NOT YET VERIFIED */</span></div>
<div class="line"><a id="l00335" name="l00335"></a><span class="lineno">  335</span>    </div>
<div class="line"><a id="l00336" name="l00336"></a><span class="lineno">  336</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR</span></div>
<div class="line"><a id="l00337" name="l00337"></a><span class="lineno">  337</span><span class="preprocessor">    #define TRC_HWTC_COUNT mfspr(0x3db)</span></div>
<div class="line"><a id="l00338" name="l00338"></a><span class="lineno">  338</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (TRACE_CPU_CLOCK_HZ / TRC_TICK_RATE_HZ)</span></div>
<div class="line"><a id="l00339" name="l00339"></a><span class="lineno">  339</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00340" name="l00340"></a><span class="lineno">  340</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00341" name="l00341"></a><span class="lineno">  341</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00342" name="l00342"></a><span class="lineno">  342</span> </div>
<div class="line"><a id="l00343" name="l00343"></a><span class="lineno">  343</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_PPC440)</span></div>
<div class="line"><a id="l00344" name="l00344"></a><span class="lineno">  344</span> </div>
<div class="line"><a id="l00345" name="l00345"></a><span class="lineno">  345</span>    <span class="comment">/* UNOFFICIAL PORT */</span></div>
<div class="line"><a id="l00346" name="l00346"></a><span class="lineno">  346</span> </div>
<div class="line"><a id="l00347" name="l00347"></a><span class="lineno">  347</span>    <span class="comment">/* This should work with most PowerPC chips */</span></div>
<div class="line"><a id="l00348" name="l00348"></a><span class="lineno">  348</span> </div>
<div class="line"><a id="l00349" name="l00349"></a><span class="lineno">  349</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR</span></div>
<div class="line"><a id="l00350" name="l00350"></a><span class="lineno">  350</span><span class="preprocessor">    #define TRC_HWTC_COUNT mfspr(0x016)</span></div>
<div class="line"><a id="l00351" name="l00351"></a><span class="lineno">  351</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (TRACE_CPU_CLOCK_HZ / TRC_TICK_RATE_HZ)</span></div>
<div class="line"><a id="l00352" name="l00352"></a><span class="lineno">  352</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00353" name="l00353"></a><span class="lineno">  353</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00354" name="l00354"></a><span class="lineno">  354</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00355" name="l00355"></a><span class="lineno">  355</span> </div>
<div class="line"><a id="l00356" name="l00356"></a><span class="lineno">  356</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_MICROBLAZE)</span></div>
<div class="line"><a id="l00357" name="l00357"></a><span class="lineno">  357</span> </div>
<div class="line"><a id="l00358" name="l00358"></a><span class="lineno">  358</span>    <span class="comment">/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */</span></div>
<div class="line"><a id="l00359" name="l00359"></a><span class="lineno">  359</span> </div>
<div class="line"><a id="l00360" name="l00360"></a><span class="lineno">  360</span>    <span class="comment">/* This should work with most Microblaze configurations.</span></div>
<div class="line"><a id="l00361" name="l00361"></a><span class="lineno">  361</span><span class="comment">     * It uses the AXI Timer 0 - the tick interrupt source.</span></div>
<div class="line"><a id="l00362" name="l00362"></a><span class="lineno">  362</span><span class="comment">     * If an AXI Timer 0 peripheral is available on your hardware platform, no modifications are required.</span></div>
<div class="line"><a id="l00363" name="l00363"></a><span class="lineno">  363</span><span class="comment">     */</span></div>
<div class="line"><a id="l00364" name="l00364"></a><span class="lineno">  364</span><span class="preprocessor">    #include &lt;xtmrctr_l.h&gt;</span></div>
<div class="line"><a id="l00365" name="l00365"></a><span class="lineno">  365</span>    </div>
<div class="line"><a id="l00366" name="l00366"></a><span class="lineno">  366</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR</span></div>
<div class="line"><a id="l00367" name="l00367"></a><span class="lineno">  367</span><span class="preprocessor">    #define TRC_HWTC_COUNT XTmrCtr_GetTimerCounterReg( XPAR_TMRCTR_0_BASEADDR, 0 )</span></div>
<div class="line"><a id="l00368" name="l00368"></a><span class="lineno">  368</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (XTmrCtr_GetLoadReg( XPAR_TMRCTR_0_BASEADDR, 0) + 1)</span></div>
<div class="line"><a id="l00369" name="l00369"></a><span class="lineno">  369</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 16</span></div>
<div class="line"><a id="l00370" name="l00370"></a><span class="lineno">  370</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00371" name="l00371"></a><span class="lineno">  371</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00372" name="l00372"></a><span class="lineno">  372</span> </div>
<div class="line"><a id="l00373" name="l00373"></a><span class="lineno">  373</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XILINX_ZyncUltraScaleR5)</span></div>
<div class="line"><a id="l00374" name="l00374"></a><span class="lineno">  374</span> </div>
<div class="line"><a id="l00375" name="l00375"></a><span class="lineno">  375</span>    <span class="keyword">extern</span> uint32_t cortex_a9_r5_enter_critical(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00376" name="l00376"></a><span class="lineno">  376</span>    <span class="keyword">extern</span> <span class="keywordtype">void</span> cortex_a9_r5_exit_critical(uint32_t irq_already_masked_at_enter);</div>
<div class="line"><a id="l00377" name="l00377"></a><span class="lineno">  377</span> </div>
<div class="line"><a id="l00378" name="l00378"></a><span class="lineno">  378</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceUnsignedBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00379" name="l00379"></a><span class="lineno">  379</span> </div>
<div class="line"><a id="l00380" name="l00380"></a><span class="lineno">  380</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() { TRACE_ALLOC_CRITICAL_SECTION_NAME = (TraceUnsignedBaseType_t)cortex_a9_r5_enter_critical(); }</span></div>
<div class="line"><a id="l00381" name="l00381"></a><span class="lineno">  381</span> </div>
<div class="line"><a id="l00382" name="l00382"></a><span class="lineno">  382</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() { cortex_a9_r5_exit_critical((uint32_t)TRACE_ALLOC_CRITICAL_SECTION_NAME); }</span></div>
<div class="line"><a id="l00383" name="l00383"></a><span class="lineno">  383</span> </div>
<div class="line"><a id="l00384" name="l00384"></a><span class="lineno">  384</span><span class="preprocessor">    #include &lt;xttcps_hw.h&gt;</span></div>
<div class="line"><a id="l00385" name="l00385"></a><span class="lineno">  385</span> </div>
<div class="line"><a id="l00386" name="l00386"></a><span class="lineno">  386</span><span class="preprocessor">    #define TRC_HWTC_TYPE  TRC_OS_TIMER_INCR</span></div>
<div class="line"><a id="l00387" name="l00387"></a><span class="lineno">  387</span><span class="preprocessor">    #define TRC_HWTC_COUNT  (*(volatile uint32_t *)(configTIMER_BASEADDR + XTTCPS_COUNT_VALUE_OFFSET))</span></div>
<div class="line"><a id="l00388" name="l00388"></a><span class="lineno">  388</span><span class="preprocessor">    #define TRC_HWTC_PERIOD  (*(volatile uint32_t *)(configTIMER_BASEADDR + XTTCPS_INTERVAL_VAL_OFFSET))</span></div>
<div class="line"><a id="l00389" name="l00389"></a><span class="lineno">  389</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR  16</span></div>
<div class="line"><a id="l00390" name="l00390"></a><span class="lineno">  390</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ  (TRC_HWTC_PERIOD * TRC_TICK_RATE_HZ)</span></div>
<div class="line"><a id="l00391" name="l00391"></a><span class="lineno">  391</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER  0</span></div>
<div class="line"><a id="l00392" name="l00392"></a><span class="lineno">  392</span> </div>
<div class="line"><a id="l00393" name="l00393"></a><span class="lineno">  393</span><span class="preprocessor">    #ifdef __GNUC__</span></div>
<div class="line"><a id="l00394" name="l00394"></a><span class="lineno">  394</span> </div>
<div class="line"><a id="l00395" name="l00395"></a><span class="lineno">  395</span>    <span class="keyword">static</span> <span class="keyword">inline</span> uint32_t prvGetCPSR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00396" name="l00396"></a><span class="lineno">  396</span>    {</div>
<div class="line"><a id="l00397" name="l00397"></a><span class="lineno">  397</span>        <span class="keywordtype">unsigned</span> <span class="keywordtype">long</span> ret;</div>
<div class="line"><a id="l00398" name="l00398"></a><span class="lineno">  398</span>        <span class="comment">/* GCC-style assembly for getting the CPSR/APSR register, where the system execution mode is found. */</span></div>
<div class="line"><a id="l00399" name="l00399"></a><span class="lineno">  399</span>        <span class="keyword">asm</span> <span class="keyword">volatile</span> (<span class="stringliteral">&quot; mrs  %0, cpsr&quot;</span> : <span class="stringliteral">&quot;=r&quot;</span> (ret) : <span class="comment">/* no inputs */</span>  );</div>
<div class="line"><a id="l00400" name="l00400"></a><span class="lineno">  400</span>        <span class="keywordflow">return</span> ret;</div>
<div class="line"><a id="l00401" name="l00401"></a><span class="lineno">  401</span>    }</div>
<div class="line"><a id="l00402" name="l00402"></a><span class="lineno">  402</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00403" name="l00403"></a><span class="lineno">  403</span><span class="preprocessor">        #error &quot;Only GCC Supported!&quot;</span></div>
<div class="line"><a id="l00404" name="l00404"></a><span class="lineno">  404</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00405" name="l00405"></a><span class="lineno">  405</span> </div>
<div class="line"><a id="l00406" name="l00406"></a><span class="lineno">  406</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_Altera_NiosII)</span></div>
<div class="line"><a id="l00407" name="l00407"></a><span class="lineno">  407</span> </div>
<div class="line"><a id="l00408" name="l00408"></a><span class="lineno">  408</span>    <span class="comment">/* OFFICIAL PORT */</span></div>
<div class="line"><a id="l00409" name="l00409"></a><span class="lineno">  409</span> </div>
<div class="line"><a id="l00410" name="l00410"></a><span class="lineno">  410</span><span class="preprocessor">    #include &lt;system.h&gt;</span></div>
<div class="line"><a id="l00411" name="l00411"></a><span class="lineno">  411</span><span class="preprocessor">    #include &lt;altera_avalon_timer_regs.h&gt;</span></div>
<div class="line"><a id="l00412" name="l00412"></a><span class="lineno">  412</span><span class="preprocessor">    #include &lt;sys/alt_irq.h&gt;</span></div>
<div class="line"><a id="l00413" name="l00413"></a><span class="lineno">  413</span>    </div>
<div class="line"><a id="l00414" name="l00414"></a><span class="lineno">  414</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() alt_irq_context TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00415" name="l00415"></a><span class="lineno">  415</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION(){TRACE_ALLOC_CRITICAL_SECTION_NAME = alt_irq_disable_all();}</span></div>
<div class="line"><a id="l00416" name="l00416"></a><span class="lineno">  416</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() {alt_irq_enable_all(TRACE_ALLOC_CRITICAL_SECTION_NAME);}</span></div>
<div class="line"><a id="l00417" name="l00417"></a><span class="lineno">  417</span> </div>
<div class="line"><a id="l00418" name="l00418"></a><span class="lineno">  418</span><span class="preprocessor">    #define NOT_SET 1</span></div>
<div class="line"><a id="l00419" name="l00419"></a><span class="lineno">  419</span> </div>
<div class="line"><a id="l00420" name="l00420"></a><span class="lineno">  420</span>    <span class="comment">/* The base address for the sustem timer set.</span></div>
<div class="line"><a id="l00421" name="l00421"></a><span class="lineno">  421</span><span class="comment">     * The name user for the system timer can be found in the BSP editor.</span></div>
<div class="line"><a id="l00422" name="l00422"></a><span class="lineno">  422</span><span class="comment">     * If the name of the timer is sys_tmr SYSTEM_TIMER_BASE should be set to SYS_TMR_BASE.</span></div>
<div class="line"><a id="l00423" name="l00423"></a><span class="lineno">  423</span><span class="comment">    */</span></div>
<div class="line"><a id="l00424" name="l00424"></a><span class="lineno">  424</span><span class="preprocessor">    #define SYSTEM_TIMER_BASE NOT_SET</span></div>
<div class="line"><a id="l00425" name="l00425"></a><span class="lineno">  425</span> </div>
<div class="line"><a id="l00426" name="l00426"></a><span class="lineno">  426</span><span class="preprocessor">    #if (SYSTEM_TIMER == NOT_SET)</span></div>
<div class="line"><a id="l00427" name="l00427"></a><span class="lineno">  427</span><span class="preprocessor">        #error &quot;Set SYSTEM_TIMER_BASE to the timer base used for system ticks.&quot;</span></div>
<div class="line"><a id="l00428" name="l00428"></a><span class="lineno">  428</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00429" name="l00429"></a><span class="lineno">  429</span> </div>
<div class="line"><a id="l00430" name="l00430"></a><span class="lineno">  430</span>    <span class="keyword">static</span> <span class="keyword">inline</span> uint32_t altera_nios2_GetTimerSnapReg(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00431" name="l00431"></a><span class="lineno">  431</span>    {</div>
<div class="line"><a id="l00432" name="l00432"></a><span class="lineno">  432</span>        <span class="comment">/* A processor can read the current counter value by first writing to either snapl or snaph to request a coherent snapshot of the counter,</span></div>
<div class="line"><a id="l00433" name="l00433"></a><span class="lineno">  433</span><span class="comment">         * and then reading snapl and snaph for the full 32-bit value.</span></div>
<div class="line"><a id="l00434" name="l00434"></a><span class="lineno">  434</span><span class="comment">        */</span></div>
<div class="line"><a id="l00435" name="l00435"></a><span class="lineno">  435</span>        IOWR_ALTERA_AVALON_TIMER_SNAPL(SYSTEM_TIMER_BASE, 0);</div>
<div class="line"><a id="l00436" name="l00436"></a><span class="lineno">  436</span>        <span class="keywordflow">return</span> (IORD_ALTERA_AVALON_TIMER_SNAPH(SYSTEM_TIMER_BASE) &lt;&lt; 16) | IORD_ALTERA_AVALON_TIMER_SNAPL(SYSTEM_TIMER_BASE);</div>
<div class="line"><a id="l00437" name="l00437"></a><span class="lineno">  437</span>    }</div>
<div class="line"><a id="l00438" name="l00438"></a><span class="lineno">  438</span> </div>
<div class="line"><a id="l00439" name="l00439"></a><span class="lineno">  439</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR</span></div>
<div class="line"><a id="l00440" name="l00440"></a><span class="lineno">  440</span><span class="preprocessor">    #define TRC_HWTC_COUNT altera_nios2_GetTimerSnapReg()</span></div>
<div class="line"><a id="l00441" name="l00441"></a><span class="lineno">  441</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (configCPU_CLOCK_HZ / configTICK_RATE_HZ )</span></div>
<div class="line"><a id="l00442" name="l00442"></a><span class="lineno">  442</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 16</span></div>
<div class="line"><a id="l00443" name="l00443"></a><span class="lineno">  443</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00444" name="l00444"></a><span class="lineno">  444</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0  </span></div>
<div class="line"><a id="l00445" name="l00445"></a><span class="lineno">  445</span> </div>
<div class="line"><a id="l00446" name="l00446"></a><span class="lineno">  446</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARM_CORTEX_A9)</span></div>
<div class="line"><a id="l00447" name="l00447"></a><span class="lineno">  447</span> </div>
<div class="line"><a id="l00448" name="l00448"></a><span class="lineno">  448</span><span class="comment">    /**************************************************************************</span></div>
<div class="line"><a id="l00449" name="l00449"></a><span class="lineno">  449</span><span class="comment">    * This hardware port only supports FreeRTOS and the GCC compiler at the</span></div>
<div class="line"><a id="l00450" name="l00450"></a><span class="lineno">  450</span><span class="comment">    * moment, due to the implementation of critical sections (trcKernelPort.h).</span></div>
<div class="line"><a id="l00451" name="l00451"></a><span class="lineno">  451</span><span class="comment">    *</span></div>
<div class="line"><a id="l00452" name="l00452"></a><span class="lineno">  452</span><span class="comment">    * Assuming FreeRTOS is used:</span></div>
<div class="line"><a id="l00453" name="l00453"></a><span class="lineno">  453</span><span class="comment">    * </span></div>
<div class="line"><a id="l00454" name="l00454"></a><span class="lineno">  454</span><span class="comment">    * For critical sections, this uses vTaskEnterCritical is when called from</span></div>
<div class="line"><a id="l00455" name="l00455"></a><span class="lineno">  455</span><span class="comment">    * task context and ulPortSetInterruptMask when called from ISR context.</span></div>
<div class="line"><a id="l00456" name="l00456"></a><span class="lineno">  456</span><span class="comment">    * Thus, it does not disable all ISRs. This means that the trace recorder</span></div>
<div class="line"><a id="l00457" name="l00457"></a><span class="lineno">  457</span><span class="comment">    * can only be called from ISRs with priority less or equal to </span></div>
<div class="line"><a id="l00458" name="l00458"></a><span class="lineno">  458</span><span class="comment">    * configMAX_API_CALL_INTERRUPT_PRIORITY (like FreeRTOS fromISR functions).</span></div>
<div class="line"><a id="l00459" name="l00459"></a><span class="lineno">  459</span><span class="comment">    *</span></div>
<div class="line"><a id="l00460" name="l00460"></a><span class="lineno">  460</span><span class="comment">    * This hardware port has been tested on a Xilinx Zync 7000 (Cortex-A9).</span></div>
<div class="line"><a id="l00461" name="l00461"></a><span class="lineno">  461</span><span class="comment">    </span></div>
<div class="line"><a id="l00462" name="l00462"></a><span class="lineno">  462</span><span class="comment">    **************************************************************************/</span></div>
<div class="line"><a id="l00463" name="l00463"></a><span class="lineno">  463</span> </div>
<div class="line"><a id="l00464" name="l00464"></a><span class="lineno">  464</span> </div>
<div class="line"><a id="l00465" name="l00465"></a><span class="lineno">  465</span>    <span class="keyword">extern</span> uint32_t cortex_a9_r5_enter_critical(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00466" name="l00466"></a><span class="lineno">  466</span>    <span class="keyword">extern</span> <span class="keywordtype">void</span> cortex_a9_r5_exit_critical(uint32_t irq_already_masked_at_enter);</div>
<div class="line"><a id="l00467" name="l00467"></a><span class="lineno">  467</span> </div>
<div class="line"><a id="l00468" name="l00468"></a><span class="lineno">  468</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceUnsignedBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00469" name="l00469"></a><span class="lineno">  469</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() { TRACE_ALLOC_CRITICAL_SECTION_NAME = (TraceUnsignedBaseType_t)cortex_a9_r5_enter_critical(); }</span></div>
<div class="line"><a id="l00470" name="l00470"></a><span class="lineno">  470</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() { cortex_a9_r5_exit_critical((uint32_t)TRACE_ALLOC_CRITICAL_SECTION_NAME); }</span></div>
<div class="line"><a id="l00471" name="l00471"></a><span class="lineno">  471</span> </div>
<div class="line"><a id="l00472" name="l00472"></a><span class="lineno">  472</span>    <span class="comment">/* INPUT YOUR PERIPHERAL BASE ADDRESS HERE (0xF8F00000 for Xilinx Zynq 7000)*/</span></div>
<div class="line"><a id="l00473" name="l00473"></a><span class="lineno">  473</span><span class="preprocessor">    #define TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS  0</span></div>
<div class="line"><a id="l00474" name="l00474"></a><span class="lineno">  474</span>    </div>
<div class="line"><a id="l00475" name="l00475"></a><span class="lineno">  475</span><span class="preprocessor">    #if (TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS == 0)</span></div>
<div class="line"><a id="l00476" name="l00476"></a><span class="lineno">  476</span><span class="preprocessor">        #error &quot;Please specify TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS.&quot;</span></div>
<div class="line"><a id="l00477" name="l00477"></a><span class="lineno">  477</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00478" name="l00478"></a><span class="lineno">  478</span> </div>
<div class="line"><a id="l00479" name="l00479"></a><span class="lineno">  479</span><span class="preprocessor">    #define TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET    0x0600</span></div>
<div class="line"><a id="l00480" name="l00480"></a><span class="lineno">  480</span><span class="preprocessor">    #define TRC_CA9_MPCORE_PRIVCTR_PERIOD_REG   (*(volatile uint32_t*)(TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS + TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET + 0x00))</span></div>
<div class="line"><a id="l00481" name="l00481"></a><span class="lineno">  481</span><span class="preprocessor">    #define TRC_CA9_MPCORE_PRIVCTR_COUNTER_REG  (*(volatile uint32_t*)(TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS + TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET + 0x04))</span></div>
<div class="line"><a id="l00482" name="l00482"></a><span class="lineno">  482</span><span class="preprocessor">    #define TRC_CA9_MPCORE_PRIVCTR_CONTROL_REG  (*(volatile uint32_t*)(TRC_CA9_MPCORE_PERIPHERAL_BASE_ADDRESS + TRC_CA9_MPCORE_PRIVATE_MEMORY_OFFSET + 0x08))</span></div>
<div class="line"><a id="l00483" name="l00483"></a><span class="lineno">  483</span>    </div>
<div class="line"><a id="l00484" name="l00484"></a><span class="lineno">  484</span><span class="preprocessor">    #define TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_MASK    0x0000FF00</span></div>
<div class="line"><a id="l00485" name="l00485"></a><span class="lineno">  485</span><span class="preprocessor">    #define TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_SHIFT   8</span></div>
<div class="line"><a id="l00486" name="l00486"></a><span class="lineno">  486</span><span class="preprocessor">    #define TRC_CA9_MPCORE_PRIVCTR_PRESCALER        (((TRC_CA9_MPCORE_PRIVCTR_CONTROL_REG &amp; TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_MASK) &gt;&gt; TRC_CA9_MPCORE_PRIVCTR_CONTROL_PRESCALER_SHIFT) + 1)</span></div>
<div class="line"><a id="l00487" name="l00487"></a><span class="lineno">  487</span> </div>
<div class="line"><a id="l00488" name="l00488"></a><span class="lineno">  488</span><span class="preprocessor">    #define TRC_HWTC_TYPE                           TRC_OS_TIMER_DECR</span></div>
<div class="line"><a id="l00489" name="l00489"></a><span class="lineno">  489</span><span class="preprocessor">    #define TRC_HWTC_COUNT                          TRC_CA9_MPCORE_PRIVCTR_COUNTER_REG</span></div>
<div class="line"><a id="l00490" name="l00490"></a><span class="lineno">  490</span><span class="preprocessor">    #define TRC_HWTC_PERIOD                         (TRC_CA9_MPCORE_PRIVCTR_PERIOD_REG + 1)</span></div>
<div class="line"><a id="l00491" name="l00491"></a><span class="lineno">  491</span> </div>
<div class="line"><a id="l00492" name="l00492"></a><span class="lineno">  492</span><span class="comment">    /****************************************************************************************</span></div>
<div class="line"><a id="l00493" name="l00493"></a><span class="lineno">  493</span><span class="comment">    NOTE: The private timer ticks with a very high frequency (half the core-clock usually), </span></div>
<div class="line"><a id="l00494" name="l00494"></a><span class="lineno">  494</span><span class="comment">    depending on the prescaler used. If a low prescaler is used, the number of HW ticks between</span></div>
<div class="line"><a id="l00495" name="l00495"></a><span class="lineno">  495</span><span class="comment">    the trace events gets large, and thereby inefficient to store (sometimes extra events are</span></div>
<div class="line"><a id="l00496" name="l00496"></a><span class="lineno">  496</span><span class="comment">    needed). To improve efficiency, you may use the TRC_HWTC_DIVISOR as an additional prescaler.</span></div>
<div class="line"><a id="l00497" name="l00497"></a><span class="lineno">  497</span><span class="comment">    *****************************************************************************************/</span>  </div>
<div class="line"><a id="l00498" name="l00498"></a><span class="lineno">  498</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00499" name="l00499"></a><span class="lineno">  499</span>    </div>
<div class="line"><a id="l00500" name="l00500"></a><span class="lineno">  500</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ (TRC_TICK_RATE_HZ * TRC_HWTC_PERIOD)</span></div>
<div class="line"><a id="l00501" name="l00501"></a><span class="lineno">  501</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00502" name="l00502"></a><span class="lineno">  502</span> </div>
<div class="line"><a id="l00503" name="l00503"></a><span class="lineno">  503</span><span class="preprocessor">    #ifdef __GNUC__</span></div>
<div class="line"><a id="l00504" name="l00504"></a><span class="lineno">  504</span> </div>
<div class="line"><a id="l00505" name="l00505"></a><span class="lineno">  505</span>    <span class="keyword">static</span> <span class="keyword">inline</span> uint32_t prvGetCPSR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00506" name="l00506"></a><span class="lineno">  506</span>    {</div>
<div class="line"><a id="l00507" name="l00507"></a><span class="lineno">  507</span>        <span class="keywordtype">unsigned</span> <span class="keywordtype">long</span> ret;</div>
<div class="line"><a id="l00508" name="l00508"></a><span class="lineno">  508</span>        <span class="comment">/* GCC-style assembly for getting the CPSR/APSR register, where the system execution mode is found. */</span></div>
<div class="line"><a id="l00509" name="l00509"></a><span class="lineno">  509</span>        <span class="keyword">asm</span> <span class="keyword">volatile</span> (<span class="stringliteral">&quot; mrs  %0, cpsr&quot;</span> : <span class="stringliteral">&quot;=r&quot;</span> (ret) : <span class="comment">/* no inputs */</span>  );</div>
<div class="line"><a id="l00510" name="l00510"></a><span class="lineno">  510</span>        <span class="keywordflow">return</span> ret;</div>
<div class="line"><a id="l00511" name="l00511"></a><span class="lineno">  511</span>    }</div>
<div class="line"><a id="l00512" name="l00512"></a><span class="lineno">  512</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00513" name="l00513"></a><span class="lineno">  513</span><span class="preprocessor">        #error &quot;Only GCC Supported!&quot;</span></div>
<div class="line"><a id="l00514" name="l00514"></a><span class="lineno">  514</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00515" name="l00515"></a><span class="lineno">  515</span> </div>
<div class="line"><a id="l00516" name="l00516"></a><span class="lineno">  516</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_CYCLONE_V_HPS)</span></div>
<div class="line"><a id="l00517" name="l00517"></a><span class="lineno">  517</span><span class="preprocessor">    #include &quot;alt_clock_manager.h&quot;</span></div>
<div class="line"><a id="l00518" name="l00518"></a><span class="lineno">  518</span> </div>
<div class="line"><a id="l00519" name="l00519"></a><span class="lineno">  519</span> </div>
<div class="line"><a id="l00520" name="l00520"></a><span class="lineno">  520</span>    <span class="keyword">extern</span> uint32_t cortex_a9_r5_enter_critical(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00521" name="l00521"></a><span class="lineno">  521</span>    <span class="keyword">extern</span> <span class="keywordtype">void</span> cortex_a9_r5_exit_critical(uint32_t irq_already_masked_at_enter);</div>
<div class="line"><a id="l00522" name="l00522"></a><span class="lineno">  522</span> </div>
<div class="line"><a id="l00523" name="l00523"></a><span class="lineno">  523</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceUnsignedBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00524" name="l00524"></a><span class="lineno">  524</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() { TRACE_ALLOC_CRITICAL_SECTION_NAME = (TraceUnsignedBaseType_t)cortex_a9_r5_enter_critical(); }</span></div>
<div class="line"><a id="l00525" name="l00525"></a><span class="lineno">  525</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() { cortex_a9_r5_exit_critical((uint32_t)TRACE_ALLOC_CRITICAL_SECTION_NAME); }</span></div>
<div class="line"><a id="l00526" name="l00526"></a><span class="lineno">  526</span> </div>
<div class="line"><a id="l00527" name="l00527"></a><span class="lineno">  527</span><span class="preprocessor">    #define TRC_HWTC_TYPE                           TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00528" name="l00528"></a><span class="lineno">  528</span><span class="preprocessor">    #define TRC_HWTC_COUNT                          *((uint32_t *)0xFFFEC200)</span></div>
<div class="line"><a id="l00529" name="l00529"></a><span class="lineno">  529</span><span class="preprocessor">    #define TRC_HWTC_PERIOD                         0</span></div>
<div class="line"><a id="l00530" name="l00530"></a><span class="lineno">  530</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR                        1</span></div>
<div class="line"><a id="l00531" name="l00531"></a><span class="lineno">  531</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ                        (({     \</span></div>
<div class="line"><a id="l00532" name="l00532"></a><span class="lineno">  532</span><span class="preprocessor">        uint32_t __freq;                                    \</span></div>
<div class="line"><a id="l00533" name="l00533"></a><span class="lineno">  533</span><span class="preprocessor">        alt_clk_freq_get( ALT_CLK_MPU_PERIPH, &amp;__freq );    \</span></div>
<div class="line"><a id="l00534" name="l00534"></a><span class="lineno">  534</span><span class="preprocessor">        __freq;                                             \</span></div>
<div class="line"><a id="l00535" name="l00535"></a><span class="lineno">  535</span><span class="preprocessor">    }))</span></div>
<div class="line"><a id="l00536" name="l00536"></a><span class="lineno">  536</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER                  0</span></div>
<div class="line"><a id="l00537" name="l00537"></a><span class="lineno">  537</span> </div>
<div class="line"><a id="l00538" name="l00538"></a><span class="lineno">  538</span><span class="preprocessor">    #ifdef __GNUC__</span></div>
<div class="line"><a id="l00539" name="l00539"></a><span class="lineno">  539</span>    <span class="comment">/* For Arm Cortex-A and Cortex-R in general. */</span></div>
<div class="line"><a id="l00540" name="l00540"></a><span class="lineno">  540</span>    <span class="keyword">static</span> <span class="keyword">inline</span> uint32_t prvGetCPSR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00541" name="l00541"></a><span class="lineno">  541</span>    {</div>
<div class="line"><a id="l00542" name="l00542"></a><span class="lineno">  542</span>        <span class="keywordtype">unsigned</span> <span class="keywordtype">long</span> ret;</div>
<div class="line"><a id="l00543" name="l00543"></a><span class="lineno">  543</span>        <span class="comment">/* GCC-style assembly for getting the CPSR/APSR register, where the system execution mode is found. */</span></div>
<div class="line"><a id="l00544" name="l00544"></a><span class="lineno">  544</span>        __asm__ __volatile__(<span class="stringliteral">&quot; mrs  %0, cpsr&quot;</span> : <span class="stringliteral">&quot;=r&quot;</span> (ret) : <span class="comment">/* no inputs */</span>  );</div>
<div class="line"><a id="l00545" name="l00545"></a><span class="lineno">  545</span>        <span class="keywordflow">return</span> ret;</div>
<div class="line"><a id="l00546" name="l00546"></a><span class="lineno">  546</span>    }</div>
<div class="line"><a id="l00547" name="l00547"></a><span class="lineno">  547</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00548" name="l00548"></a><span class="lineno">  548</span><span class="preprocessor">        #error &quot;Only GCC Supported!&quot;</span></div>
<div class="line"><a id="l00549" name="l00549"></a><span class="lineno">  549</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00550" name="l00550"></a><span class="lineno">  550</span> </div>
<div class="line"><a id="l00551" name="l00551"></a><span class="lineno">  551</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ZEPHYR)</span></div>
<div class="line"><a id="l00552" name="l00552"></a><span class="lineno">  552</span><span class="preprocessor">    #ifdef CONFIG_64BIT</span></div>
<div class="line"><a id="l00553" name="l00553"></a><span class="lineno">  553</span><span class="preprocessor">        #define TRC_BASE_TYPE int64_t</span></div>
<div class="line"><a id="l00554" name="l00554"></a><span class="lineno">  554</span><span class="preprocessor">        #define TRC_UNSIGNED_BASE_TYPE uint64_t</span></div>
<div class="line"><a id="l00555" name="l00555"></a><span class="lineno">  555</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00556" name="l00556"></a><span class="lineno">  556</span><span class="preprocessor">        #define TRC_BASE_TYPE int32_t</span></div>
<div class="line"><a id="l00557" name="l00557"></a><span class="lineno">  557</span><span class="preprocessor">        #define TRC_UNSIGNED_BASE_TYPE uint32_t</span></div>
<div class="line"><a id="l00558" name="l00558"></a><span class="lineno">  558</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00559" name="l00559"></a><span class="lineno">  559</span> </div>
<div class="line"><a id="l00560" name="l00560"></a><span class="lineno">  560</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00561" name="l00561"></a><span class="lineno">  561</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() { TRACE_ALLOC_CRITICAL_SECTION_NAME = irq_lock(); }</span></div>
<div class="line"><a id="l00562" name="l00562"></a><span class="lineno">  562</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() { irq_unlock(TRACE_ALLOC_CRITICAL_SECTION_NAME); }</span></div>
<div class="line"><a id="l00563" name="l00563"></a><span class="lineno">  563</span>    </div>
<div class="line"><a id="l00564" name="l00564"></a><span class="lineno">  564</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00565" name="l00565"></a><span class="lineno">  565</span><span class="preprocessor">    #define TRC_HWTC_COUNT k_cycle_get_32()</span></div>
<div class="line"><a id="l00566" name="l00566"></a><span class="lineno">  566</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / CONFIG_SYS_CLOCK_TICKS_PER_SEC)</span></div>
<div class="line"><a id="l00567" name="l00567"></a><span class="lineno">  567</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 4</span></div>
<div class="line"><a id="l00568" name="l00568"></a><span class="lineno">  568</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC</span></div>
<div class="line"><a id="l00569" name="l00569"></a><span class="lineno">  569</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0 </span><span class="comment">// Lower IRQ priority values are more significant</span></div>
<div class="line"><a id="l00570" name="l00570"></a><span class="lineno">  570</span> </div>
<div class="line"><a id="l00571" name="l00571"></a><span class="lineno">  571</span><span class="preprocessor">    #define TRC_PORT_SPECIFIC_INIT()</span></div>
<div class="line"><a id="l00572" name="l00572"></a><span class="lineno">  572</span> </div>
<div class="line"><a id="l00573" name="l00573"></a><span class="lineno">  573</span><span class="preprocessor">#elif ((TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XTensa_LX6) || (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XTensa_LX7))</span></div>
<div class="line"><a id="l00578" name="l00578"></a><span class="lineno">  578</span><span class="preprocessor">    #if CONFIG_FREERTOS_UNICORE == 1</span></div>
<div class="line"><a id="l00579" name="l00579"></a><span class="lineno">  579</span>        </div>
<div class="line"><a id="l00580" name="l00580"></a><span class="lineno">  580</span><span class="preprocessor">        #define TRACE_ALLOC_CRITICAL_SECTION() TraceUnsignedBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00581" name="l00581"></a><span class="lineno">  581</span><span class="preprocessor">        #define TRACE_ENTER_CRITICAL_SECTION() {TRACE_ALLOC_CRITICAL_SECTION_NAME = __extension__({ unsigned __tmp;     \</span></div>
<div class="line"><a id="l00582" name="l00582"></a><span class="lineno">  582</span><span class="preprocessor">                __asm__ __volatile__(&quot;rsil  %0, 15\n&quot;</span>                                               \</div>
<div class="line"><a id="l00583" name="l00583"></a><span class="lineno">  583</span>                        : &quot;=a&quot; (__tmp) : : &quot;memory&quot; );                                              \</div>
<div class="line"><a id="l00584" name="l00584"></a><span class="lineno">  584</span>                        __tmp;});}</div>
<div class="line"><a id="l00585" name="l00585"></a><span class="lineno">  585</span><span class="preprocessor">        #define TRACE_EXIT_CRITICAL_SECTION() {portCLEAR_INTERRUPT_MASK_FROM_ISR(TRACE_ALLOC_CRITICAL_SECTION_NAME);}</span></div>
<div class="line"><a id="l00586" name="l00586"></a><span class="lineno">  586</span>        </div>
<div class="line"><a id="l00587" name="l00587"></a><span class="lineno">  587</span><span class="preprocessor">        #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00588" name="l00588"></a><span class="lineno">  588</span><span class="preprocessor">        #define TRC_HWTC_COUNT ({ unsigned int __ccount;            \</span></div>
<div class="line"><a id="l00589" name="l00589"></a><span class="lineno">  589</span><span class="preprocessor">            __asm__ __volatile__(&quot;rsr.ccount %0&quot;</span> : &quot;=a&quot;(__ccount)); \</div>
<div class="line"><a id="l00590" name="l00590"></a><span class="lineno">  590</span>            __ccount; })</div>
<div class="line"><a id="l00591" name="l00591"></a><span class="lineno">  591</span><span class="preprocessor">#ifdef CONFIG_IDF_TARGET_ESP32</span></div>
<div class="line"><a id="l00592" name="l00592"></a><span class="lineno">  592</span><span class="preprocessor">        #define TRC_HWTC_FREQ_HZ (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000)</span></div>
<div class="line"><a id="l00593" name="l00593"></a><span class="lineno">  593</span><span class="preprocessor">#elif defined(CONFIG_IDF_TARGET_ESP32S2)</span></div>
<div class="line"><a id="l00594" name="l00594"></a><span class="lineno">  594</span><span class="preprocessor">        #define TRC_HWTC_FREQ_HZ (CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ * 1000000)</span></div>
<div class="line"><a id="l00595" name="l00595"></a><span class="lineno">  595</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00596" name="l00596"></a><span class="lineno">  596</span><span class="preprocessor">        #error &quot;Invalid IDF target, check your sdkconfig.&quot;</span></div>
<div class="line"><a id="l00597" name="l00597"></a><span class="lineno">  597</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00598" name="l00598"></a><span class="lineno">  598</span><span class="preprocessor">        #define TRC_HWTC_PERIOD 0</span></div>
<div class="line"><a id="l00599" name="l00599"></a><span class="lineno">  599</span><span class="preprocessor">        #define TRC_HWTC_DIVISOR 4</span></div>
<div class="line"><a id="l00600" name="l00600"></a><span class="lineno">  600</span><span class="preprocessor">        #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00601" name="l00601"></a><span class="lineno">  601</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00607" name="l00607"></a><span class="lineno">  607</span>        uint32_t prvGetSMPTimestamp();</div>
<div class="line"><a id="l00608" name="l00608"></a><span class="lineno">  608</span> </div>
<div class="line"><a id="l00609" name="l00609"></a><span class="lineno">  609</span><span class="preprocessor">        #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00610" name="l00610"></a><span class="lineno">  610</span><span class="preprocessor">        #define TRC_HWTC_COUNT prvGetSMPTimestamp()</span></div>
<div class="line"><a id="l00611" name="l00611"></a><span class="lineno">  611</span><span class="preprocessor">        #define TRC_HWTC_FREQ_HZ 1000000</span></div>
<div class="line"><a id="l00612" name="l00612"></a><span class="lineno">  612</span><span class="preprocessor">        #define TRC_HWTC_PERIOD 0</span></div>
<div class="line"><a id="l00613" name="l00613"></a><span class="lineno">  613</span><span class="preprocessor">        #define TRC_HWTC_DIVISOR 4</span></div>
<div class="line"><a id="l00614" name="l00614"></a><span class="lineno">  614</span><span class="preprocessor">        #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00615" name="l00615"></a><span class="lineno">  615</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00616" name="l00616"></a><span class="lineno">  616</span> </div>
<div class="line"><a id="l00617" name="l00617"></a><span class="lineno">  617</span><span class="preprocessor">    #if !defined(TRC_HWTC_FREQ_HZ)</span></div>
<div class="line"><a id="l00618" name="l00618"></a><span class="lineno">  618</span><span class="preprocessor">        #error &quot;The XTensa LX6/LX7 trace hardware clock frequency is not defined.&quot;</span></div>
<div class="line"><a id="l00619" name="l00619"></a><span class="lineno">  619</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00620" name="l00620"></a><span class="lineno">  620</span> </div>
<div class="line"><a id="l00621" name="l00621"></a><span class="lineno">  621</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_RISCV_RV32I)</span></div>
<div class="line"><a id="l00622" name="l00622"></a><span class="lineno">  622</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceUnsignedBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00623" name="l00623"></a><span class="lineno">  623</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() __asm__ __volatile__(&quot;csrr %0, mstatus   \n\t&quot;</span>   \</div>
<div class="line"><a id="l00624" name="l00624"></a><span class="lineno">  624</span>                                                                &quot;csrci mstatus, 8   \n\t&quot;   \</div>
<div class="line"><a id="l00625" name="l00625"></a><span class="lineno">  625</span>                                                                &quot;andi %0, %0, 8     \n\t&quot;   \</div>
<div class="line"><a id="l00626" name="l00626"></a><span class="lineno">  626</span>                                                                : &quot;=r&quot;(TRACE_ALLOC_CRITICAL_SECTION_NAME))</div>
<div class="line"><a id="l00627" name="l00627"></a><span class="lineno">  627</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() __asm__ __volatile__(&quot;csrr a1, mstatus    \n\t&quot;</span>   \</div>
<div class="line"><a id="l00628" name="l00628"></a><span class="lineno">  628</span>                                                                &quot;or %0, %0, a1      \n\t&quot;   \</div>
<div class="line"><a id="l00629" name="l00629"></a><span class="lineno">  629</span>                                                                &quot;csrs mstatus, %0   \n\t&quot;   \</div>
<div class="line"><a id="l00630" name="l00630"></a><span class="lineno">  630</span>                                                                :                           \</div>
<div class="line"><a id="l00631" name="l00631"></a><span class="lineno">  631</span>                                                                : &quot;r&quot; (TRACE_ALLOC_CRITICAL_SECTION_NAME)   \</div>
<div class="line"><a id="l00632" name="l00632"></a><span class="lineno">  632</span>                                                                : &quot;a1&quot;)</div>
<div class="line"><a id="l00633" name="l00633"></a><span class="lineno">  633</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00634" name="l00634"></a><span class="lineno">  634</span><span class="preprocessor">    #define TRC_HWTC_COUNT ({ unsigned int __count;         \</span></div>
<div class="line"><a id="l00635" name="l00635"></a><span class="lineno">  635</span><span class="preprocessor">        __asm__ __volatile__(&quot;rdcycle %0&quot;</span> : &quot;=r&quot;(__count)); \</div>
<div class="line"><a id="l00636" name="l00636"></a><span class="lineno">  636</span>        __count; })</div>
<div class="line"><a id="l00637" name="l00637"></a><span class="lineno">  637</span><span class="preprocessor">    #define TRC_HWTC_PERIOD 0</span></div>
<div class="line"><a id="l00638" name="l00638"></a><span class="lineno">  638</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00639" name="l00639"></a><span class="lineno">  639</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ 16000000</span></div>
<div class="line"><a id="l00640" name="l00640"></a><span class="lineno">  640</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00641" name="l00641"></a><span class="lineno">  641</span> </div>
<div class="line"><a id="l00642" name="l00642"></a><span class="lineno">  642</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_XMOS_XCOREAI)</span></div>
<div class="line"><a id="l00643" name="l00643"></a><span class="lineno">  643</span><span class="preprocessor">    #define TRC_PORT_SPECIFIC_INIT()</span></div>
<div class="line"><a id="l00644" name="l00644"></a><span class="lineno">  644</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00645" name="l00645"></a><span class="lineno">  645</span><span class="preprocessor">    #define TRC_HWTC_COUNT xscope_gettime()</span></div>
<div class="line"><a id="l00646" name="l00646"></a><span class="lineno">  646</span><span class="preprocessor">    #define TRC_HWTC_PERIOD (configCPU_CLOCK_HZ / configTICK_RATE_HZ )</span></div>
<div class="line"><a id="l00647" name="l00647"></a><span class="lineno">  647</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 4</span></div>
<div class="line"><a id="l00648" name="l00648"></a><span class="lineno">  648</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ 100000000</span></div>
<div class="line"><a id="l00649" name="l00649"></a><span class="lineno">  649</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 0</span></div>
<div class="line"><a id="l00650" name="l00650"></a><span class="lineno">  650</span> </div>
<div class="line"><a id="l00651" name="l00651"></a><span class="lineno">  651</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_POWERPC_Z4)</span></div>
<div class="line"><a id="l00652" name="l00652"></a><span class="lineno">  652</span> </div>
<div class="line"><a id="l00653" name="l00653"></a><span class="lineno">  653</span>    <span class="comment">/* UNOFFICIAL PORT - NOT YET VERIFIED BY PERCEPIO */</span></div>
<div class="line"><a id="l00654" name="l00654"></a><span class="lineno">  654</span>    </div>
<div class="line"><a id="l00655" name="l00655"></a><span class="lineno">  655</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00656" name="l00656"></a><span class="lineno">  656</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() { TRACE_ALLOC_CRITICAL_SECTION_NAME = TRC_KERNEL_PORT_SET_INTERRUPT_MASK(); }</span></div>
<div class="line"><a id="l00657" name="l00657"></a><span class="lineno">  657</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() { TRC_KERNEL_PORT_CLEAR_INTERRUPT_MASK(TRACE_ALLOC_CRITICAL_SECTION_NAME); }</span></div>
<div class="line"><a id="l00658" name="l00658"></a><span class="lineno">  658</span> </div>
<div class="line"><a id="l00659" name="l00659"></a><span class="lineno">  659</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_OS_TIMER_DECR</span></div>
<div class="line"><a id="l00660" name="l00660"></a><span class="lineno">  660</span>    <span class="comment">//#define HWTC_COUNT_DIRECTION DIRECTION_DECREMENTING</span></div>
<div class="line"><a id="l00661" name="l00661"></a><span class="lineno">  661</span><span class="preprocessor">    #define TRC_HWTC_COUNT PIT.TIMER[configTICK_PIT_CHANNEL].CVAL.R </span><span class="comment">// must be the PIT channel used for the systick</span></div>
<div class="line"><a id="l00662" name="l00662"></a><span class="lineno">  662</span><span class="preprocessor">    #define TRC_HWTC_PERIOD ((configPIT_CLOCK_HZ / configTICK_RATE_HZ) - 1U) </span><span class="comment">// TODO FIXME or maybe not -1? what&#39;s the right &quot;period&quot; value?</span></div>
<div class="line"><a id="l00663" name="l00663"></a><span class="lineno">  663</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ configPIT_CLOCK_HZ</span></div>
<div class="line"><a id="l00664" name="l00664"></a><span class="lineno">  664</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00665" name="l00665"></a><span class="lineno">  665</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 1 </span><span class="comment">// higher IRQ priority values are more significant</span></div>
<div class="line"><a id="l00666" name="l00666"></a><span class="lineno">  666</span> </div>
<div class="line"><a id="l00667" name="l00667"></a><span class="lineno">  667</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ARMv8AR_A32)</span></div>
<div class="line"><a id="l00668" name="l00668"></a><span class="lineno">  668</span>    <span class="keyword">extern</span> uint32_t cortex_a9_r5_enter_critical(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00669" name="l00669"></a><span class="lineno">  669</span>    <span class="keyword">extern</span> <span class="keywordtype">void</span> cortex_a9_r5_exit_critical(uint32_t irq_already_masked_at_enter);</div>
<div class="line"><a id="l00670" name="l00670"></a><span class="lineno">  670</span> </div>
<div class="line"><a id="l00671" name="l00671"></a><span class="lineno">  671</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceUnsignedBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00672" name="l00672"></a><span class="lineno">  672</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() { TRACE_ALLOC_CRITICAL_SECTION_NAME = (TraceUnsignedBaseType_t)cortex_a9_r5_enter_critical(); }</span></div>
<div class="line"><a id="l00673" name="l00673"></a><span class="lineno">  673</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() { cortex_a9_r5_exit_critical((uint32_t)TRACE_ALLOC_CRITICAL_SECTION_NAME); }</span></div>
<div class="line"><a id="l00674" name="l00674"></a><span class="lineno">  674</span> </div>
<div class="line"><a id="l00675" name="l00675"></a><span class="lineno">  675</span><span class="preprocessor">    #include &lt;cmsis_compiler.h&gt;</span></div>
<div class="line"><a id="l00676" name="l00676"></a><span class="lineno">  676</span> </div>
<div class="line"><a id="l00677" name="l00677"></a><span class="lineno">  677</span><span class="preprocessor">    #define TRC_HWTC_TYPE  TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00678" name="l00678"></a><span class="lineno">  678</span><span class="preprocessor">    #define TRC_HWTC_COUNT  ((uint32_t)__get_CNTPCT())</span></div>
<div class="line"><a id="l00679" name="l00679"></a><span class="lineno">  679</span><span class="preprocessor">    #define TRC_HWTC_PERIOD  0</span></div>
<div class="line"><a id="l00680" name="l00680"></a><span class="lineno">  680</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR  16</span></div>
<div class="line"><a id="l00681" name="l00681"></a><span class="lineno">  681</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ  (R_GSC-&gt;CNTFID0)</span></div>
<div class="line"><a id="l00682" name="l00682"></a><span class="lineno">  682</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER  0</span></div>
<div class="line"><a id="l00683" name="l00683"></a><span class="lineno">  683</span> </div>
<div class="line"><a id="l00684" name="l00684"></a><span class="lineno">  684</span><span class="preprocessor">    #ifdef __GNUC__</span></div>
<div class="line"><a id="l00685" name="l00685"></a><span class="lineno">  685</span>    <span class="comment">/* For Arm Cortex-A and Cortex-R in general. */</span></div>
<div class="line"><a id="l00686" name="l00686"></a><span class="lineno">  686</span>    <span class="keyword">static</span> <span class="keyword">inline</span> uint32_t prvGetCPSR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00687" name="l00687"></a><span class="lineno">  687</span>    {</div>
<div class="line"><a id="l00688" name="l00688"></a><span class="lineno">  688</span>        <span class="keywordtype">unsigned</span> <span class="keywordtype">long</span> ret;</div>
<div class="line"><a id="l00689" name="l00689"></a><span class="lineno">  689</span>        <span class="comment">/* GCC-style assembly for getting the CPSR/APSR register, where the system execution mode is found. */</span></div>
<div class="line"><a id="l00690" name="l00690"></a><span class="lineno">  690</span>        __asm <span class="keyword">volatile</span> (<span class="stringliteral">&quot; mrs  %0, cpsr&quot;</span> : <span class="stringliteral">&quot;=r&quot;</span> (ret) : <span class="comment">/* no inputs */</span>  );</div>
<div class="line"><a id="l00691" name="l00691"></a><span class="lineno">  691</span>        <span class="keywordflow">return</span> ret;</div>
<div class="line"><a id="l00692" name="l00692"></a><span class="lineno">  692</span>    }</div>
<div class="line"><a id="l00693" name="l00693"></a><span class="lineno">  693</span><span class="preprocessor">    #else</span></div>
<div class="line"><a id="l00694" name="l00694"></a><span class="lineno">  694</span><span class="preprocessor">        #error &quot;Only GCC Supported!&quot;</span></div>
<div class="line"><a id="l00695" name="l00695"></a><span class="lineno">  695</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00696" name="l00696"></a><span class="lineno">  696</span> </div>
<div class="line"><a id="l00697" name="l00697"></a><span class="lineno">  697</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_ADSP_SC5XX_SHARC)</span></div>
<div class="line"><a id="l00698" name="l00698"></a><span class="lineno">  698</span> </div>
<div class="line"><a id="l00699" name="l00699"></a><span class="lineno">  699</span><span class="preprocessor">    #define TRACE_ALLOC_CRITICAL_SECTION() TraceUnsignedBaseType_t TRACE_ALLOC_CRITICAL_SECTION_NAME;</span></div>
<div class="line"><a id="l00700" name="l00700"></a><span class="lineno">  700</span><span class="preprocessor">    #define TRACE_ENTER_CRITICAL_SECTION() {TRACE_ALLOC_CRITICAL_SECTION_NAME = (TraceUnsignedBaseType_t)portSET_INTERRUPT_MASK_FROM_ISR();}</span></div>
<div class="line"><a id="l00701" name="l00701"></a><span class="lineno">  701</span><span class="preprocessor">    #define TRACE_EXIT_CRITICAL_SECTION() {portCLEAR_INTERRUPT_MASK_FROM_ISR((UBaseType_t)TRACE_ALLOC_CRITICAL_SECTION_NAME);}</span></div>
<div class="line"><a id="l00702" name="l00702"></a><span class="lineno">  702</span> </div>
<div class="line"><a id="l00703" name="l00703"></a><span class="lineno">  703</span><span class="preprocessor">    #define TRC_HWTC_TYPE TRC_FREE_RUNNING_32BIT_INCR</span></div>
<div class="line"><a id="l00704" name="l00704"></a><span class="lineno">  704</span><span class="preprocessor">    #define TRC_HWTC_COUNT ( *pREG_CGU0_TSCOUNT0 )</span></div>
<div class="line"><a id="l00705" name="l00705"></a><span class="lineno">  705</span><span class="preprocessor">    #define TRC_HWTC_PERIOD 1</span></div>
<div class="line"><a id="l00706" name="l00706"></a><span class="lineno">  706</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00707" name="l00707"></a><span class="lineno">  707</span><span class="preprocessor">    #define TRC_HWTC_FREQ_HZ ( configCPU_CLOCK_HZ &gt;&gt; 1u )</span></div>
<div class="line"><a id="l00708" name="l00708"></a><span class="lineno">  708</span> </div>
<div class="line"><a id="l00709" name="l00709"></a><span class="lineno">  709</span><span class="preprocessor">    #define TRC_PORT_SPECIFIC_INIT() {*pREG_CGU0_TSCTL |= BITM_CGU_TSCTL_EN;}</span></div>
<div class="line"><a id="l00710" name="l00710"></a><span class="lineno">  710</span> </div>
<div class="line"><a id="l00711" name="l00711"></a><span class="lineno">  711</span>    <span class="comment">/* Set the meaning of IRQ priorities in ISR tracing - see above */</span></div>
<div class="line"><a id="l00712" name="l00712"></a><span class="lineno">  712</span><span class="preprocessor">    #define TRC_IRQ_PRIORITY_ORDER 1</span></div>
<div class="line"><a id="l00713" name="l00713"></a><span class="lineno">  713</span> </div>
<div class="line"><a id="l00714" name="l00714"></a><span class="lineno">  714</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT == TRC_HARDWARE_PORT_APPLICATION_DEFINED)</span></div>
<div class="line"><a id="l00715" name="l00715"></a><span class="lineno">  715</span> </div>
<div class="line"><a id="l00716" name="l00716"></a><span class="lineno">  716</span><span class="preprocessor">    #if !( defined (TRC_HWTC_TYPE) &amp;&amp; defined (TRC_HWTC_COUNT) &amp;&amp; defined (TRC_HWTC_PERIOD) &amp;&amp; defined (TRC_HWTC_FREQ_HZ) &amp;&amp; defined (TRC_IRQ_PRIORITY_ORDER) )</span></div>
<div class="line"><a id="l00717" name="l00717"></a><span class="lineno">  717</span><span class="preprocessor">        #error &quot;The hardware port is not completely defined!&quot;</span></div>
<div class="line"><a id="l00718" name="l00718"></a><span class="lineno">  718</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00719" name="l00719"></a><span class="lineno">  719</span> </div>
<div class="line"><a id="l00720" name="l00720"></a><span class="lineno">  720</span><span class="preprocessor">#elif (TRC_CFG_HARDWARE_PORT != TRC_HARDWARE_PORT_NOT_SET)</span></div>
<div class="line"><a id="l00721" name="l00721"></a><span class="lineno">  721</span> </div>
<div class="line"><a id="l00722" name="l00722"></a><span class="lineno">  722</span><span class="preprocessor">    #error &quot;TRC_CFG_HARDWARE_PORT had unsupported value!&quot;</span></div>
<div class="line"><a id="l00723" name="l00723"></a><span class="lineno">  723</span><span class="preprocessor">    #define TRC_CFG_HARDWARE_PORT TRC_HARDWARE_PORT_NOT_SET</span></div>
<div class="line"><a id="l00724" name="l00724"></a><span class="lineno">  724</span> </div>
<div class="line"><a id="l00725" name="l00725"></a><span class="lineno">  725</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00726" name="l00726"></a><span class="lineno">  726</span> </div>
<div class="line"><a id="l00727" name="l00727"></a><span class="lineno">  727</span><span class="preprocessor">#ifndef TRC_HWTC_DIVISOR</span></div>
<div class="line"><a id="l00728" name="l00728"></a><span class="lineno">  728</span><span class="preprocessor">    #define TRC_HWTC_DIVISOR 1</span></div>
<div class="line"><a id="l00729" name="l00729"></a><span class="lineno">  729</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00730" name="l00730"></a><span class="lineno">  730</span> </div>
<div class="line"><a id="l00731" name="l00731"></a><span class="lineno">  731</span><span class="preprocessor">#ifndef TRC_PORT_SPECIFIC_INIT</span></div>
<div class="line"><a id="l00732" name="l00732"></a><span class="lineno">  732</span><span class="preprocessor">    #define TRC_PORT_SPECIFIC_INIT() </span></div>
<div class="line"><a id="l00733" name="l00733"></a><span class="lineno">  733</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00734" name="l00734"></a><span class="lineno">  734</span> </div>
<div class="line"><a id="l00735" name="l00735"></a><span class="lineno">  735</span><span class="comment">/* If Win32 port */</span></div>
<div class="line"><a id="l00736" name="l00736"></a><span class="lineno">  736</span><span class="preprocessor">#ifdef WIN32</span></div>
<div class="line"><a id="l00737" name="l00737"></a><span class="lineno">  737</span> </div>
<div class="line"><a id="l00738" name="l00738"></a><span class="lineno">  738</span><span class="preprocessor">    #undef _WIN32_WINNT</span></div>
<div class="line"><a id="l00739" name="l00739"></a><span class="lineno">  739</span><span class="preprocessor">    #define _WIN32_WINNT 0x0600</span></div>
<div class="line"><a id="l00740" name="l00740"></a><span class="lineno">  740</span> </div>
<div class="line"><a id="l00741" name="l00741"></a><span class="lineno">  741</span>    <span class="comment">/* Standard includes. */</span></div>
<div class="line"><a id="l00742" name="l00742"></a><span class="lineno">  742</span><span class="preprocessor">    #include &lt;stdio.h&gt;</span></div>
<div class="line"><a id="l00743" name="l00743"></a><span class="lineno">  743</span><span class="preprocessor">    #include &lt;windows.h&gt;</span></div>
<div class="line"><a id="l00744" name="l00744"></a><span class="lineno">  744</span><span class="preprocessor">    #include &lt;direct.h&gt;</span></div>
<div class="line"><a id="l00745" name="l00745"></a><span class="lineno">  745</span> </div>
<div class="line"><a id="l00746" name="l00746"></a><span class="lineno">  746</span><span class="comment">    /***************************************************************************</span></div>
<div class="line"><a id="l00747" name="l00747"></a><span class="lineno">  747</span><span class="comment">    * The Win32 port by default saves the trace to file and then kills the</span></div>
<div class="line"><a id="l00748" name="l00748"></a><span class="lineno">  748</span><span class="comment">    * program when the recorder is stopped, to facilitate quick, simple tests</span></div>
<div class="line"><a id="l00749" name="l00749"></a><span class="lineno">  749</span><span class="comment">    * of the recorder.</span></div>
<div class="line"><a id="l00750" name="l00750"></a><span class="lineno">  750</span><span class="comment">    ***************************************************************************/</span></div>
<div class="line"><a id="l00751" name="l00751"></a><span class="lineno">  751</span><span class="preprocessor">    #define WIN32_PORT_SAVE_WHEN_STOPPED 1</span></div>
<div class="line"><a id="l00752" name="l00752"></a><span class="lineno">  752</span><span class="preprocessor">    #define WIN32_PORT_EXIT_WHEN_STOPPED 1</span></div>
<div class="line"><a id="l00753" name="l00753"></a><span class="lineno">  753</span> </div>
<div class="line"><a id="l00754" name="l00754"></a><span class="lineno">  754</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00755" name="l00755"></a><span class="lineno">  755</span> </div>
<div class="line"><a id="l00756" name="l00756"></a><span class="lineno">  756</span><span class="preprocessor">#if (TRC_CFG_HARDWARE_PORT != TRC_HARDWARE_PORT_NOT_SET)</span></div>
<div class="line"><a id="l00757" name="l00757"></a><span class="lineno">  757</span>    </div>
<div class="line"><a id="l00758" name="l00758"></a><span class="lineno">  758</span><span class="preprocessor">    #ifndef TRC_HWTC_TYPE</span></div>
<div class="line"><a id="l00759" name="l00759"></a><span class="lineno">  759</span><span class="preprocessor">    #error &quot;TRC_HWTC_TYPE is not set!&quot;</span></div>
<div class="line"><a id="l00760" name="l00760"></a><span class="lineno">  760</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00761" name="l00761"></a><span class="lineno">  761</span> </div>
<div class="line"><a id="l00762" name="l00762"></a><span class="lineno">  762</span><span class="preprocessor">    #ifndef TRC_HWTC_COUNT</span></div>
<div class="line"><a id="l00763" name="l00763"></a><span class="lineno">  763</span><span class="preprocessor">    #error &quot;TRC_HWTC_COUNT is not set!&quot;</span></div>
<div class="line"><a id="l00764" name="l00764"></a><span class="lineno">  764</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00765" name="l00765"></a><span class="lineno">  765</span> </div>
<div class="line"><a id="l00766" name="l00766"></a><span class="lineno">  766</span><span class="preprocessor">    #ifndef TRC_HWTC_PERIOD</span></div>
<div class="line"><a id="l00767" name="l00767"></a><span class="lineno">  767</span><span class="preprocessor">    #error &quot;TRC_HWTC_PERIOD is not set!&quot;</span></div>
<div class="line"><a id="l00768" name="l00768"></a><span class="lineno">  768</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00769" name="l00769"></a><span class="lineno">  769</span> </div>
<div class="line"><a id="l00770" name="l00770"></a><span class="lineno">  770</span><span class="preprocessor">    #ifndef TRC_HWTC_DIVISOR</span></div>
<div class="line"><a id="l00771" name="l00771"></a><span class="lineno">  771</span><span class="preprocessor">    #error &quot;TRC_HWTC_DIVISOR is not set!&quot;</span></div>
<div class="line"><a id="l00772" name="l00772"></a><span class="lineno">  772</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00773" name="l00773"></a><span class="lineno">  773</span> </div>
<div class="line"><a id="l00774" name="l00774"></a><span class="lineno">  774</span><span class="preprocessor">    #ifndef TRC_IRQ_PRIORITY_ORDER</span></div>
<div class="line"><a id="l00775" name="l00775"></a><span class="lineno">  775</span><span class="preprocessor">    #error &quot;TRC_IRQ_PRIORITY_ORDER is not set!&quot;</span></div>
<div class="line"><a id="l00776" name="l00776"></a><span class="lineno">  776</span><span class="preprocessor">    #elif (TRC_IRQ_PRIORITY_ORDER != 0) &amp;&amp; (TRC_IRQ_PRIORITY_ORDER != 1)</span></div>
<div class="line"><a id="l00777" name="l00777"></a><span class="lineno">  777</span><span class="preprocessor">    #error &quot;TRC_IRQ_PRIORITY_ORDER has bad value!&quot;</span></div>
<div class="line"><a id="l00778" name="l00778"></a><span class="lineno">  778</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00779" name="l00779"></a><span class="lineno">  779</span> </div>
<div class="line"><a id="l00780" name="l00780"></a><span class="lineno">  780</span><span class="preprocessor">    #if (TRC_HWTC_DIVISOR &lt; 1)</span></div>
<div class="line"><a id="l00781" name="l00781"></a><span class="lineno">  781</span><span class="preprocessor">    #error &quot;TRC_HWTC_DIVISOR must be a non-zero positive value!&quot;</span></div>
<div class="line"><a id="l00782" name="l00782"></a><span class="lineno">  782</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00783" name="l00783"></a><span class="lineno">  783</span>    </div>
<div class="line"><a id="l00784" name="l00784"></a><span class="lineno">  784</span><span class="preprocessor">    #ifndef TRC_HWTC_FREQ_HZ </span></div>
<div class="line"><a id="l00785" name="l00785"></a><span class="lineno">  785</span><span class="preprocessor">    #error &quot;TRC_HWTC_FREQ_HZ not defined!&quot;</span></div>
<div class="line"><a id="l00786" name="l00786"></a><span class="lineno">  786</span><span class="preprocessor">    #endif</span></div>
<div class="line"><a id="l00787" name="l00787"></a><span class="lineno">  787</span>    </div>
<div class="line"><a id="l00788" name="l00788"></a><span class="lineno">  788</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00789" name="l00789"></a><span class="lineno">  789</span> </div>
<div class="line"><a id="l00790" name="l00790"></a><span class="lineno">  790</span><span class="comment">/* If a custom TRC_CFG_ALLOC_CRITICAL_SECTION is defined it will override the default definition */</span></div>
<div class="line"><a id="l00791" name="l00791"></a><span class="lineno">  791</span><span class="preprocessor">#ifdef TRC_CFG_ALLOC_CRITICAL_SECTION</span></div>
<div class="line"><a id="l00792" name="l00792"></a><span class="lineno">  792</span><span class="preprocessor">#undef TRACE_ALLOC_CRITICAL_SECTION</span></div>
<div class="line"><a id="l00793" name="l00793"></a><span class="lineno">  793</span><span class="preprocessor">#define TRACE_ALLOC_CRITICAL_SECTION() TRC_CFG_ALLOC_CRITICAL_SECTION()</span></div>
<div class="line"><a id="l00794" name="l00794"></a><span class="lineno">  794</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00795" name="l00795"></a><span class="lineno">  795</span> </div>
<div class="line"><a id="l00796" name="l00796"></a><span class="lineno">  796</span><span class="comment">/* If a custom TRC_CFG_ENTER_CRITICAL_SECTION is defined it will override the default definition */</span></div>
<div class="line"><a id="l00797" name="l00797"></a><span class="lineno">  797</span><span class="preprocessor">#ifdef TRC_CFG_ENTER_CRITICAL_SECTION</span></div>
<div class="line"><a id="l00798" name="l00798"></a><span class="lineno">  798</span><span class="preprocessor">#undef TRACE_ENTER_CRITICAL_SECTION</span></div>
<div class="line"><a id="l00799" name="l00799"></a><span class="lineno">  799</span><span class="preprocessor">#define TRACE_ENTER_CRITICAL_SECTION() TRC_CFG_ENTER_CRITICAL_SECTION()</span></div>
<div class="line"><a id="l00800" name="l00800"></a><span class="lineno">  800</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00801" name="l00801"></a><span class="lineno">  801</span> </div>
<div class="line"><a id="l00802" name="l00802"></a><span class="lineno">  802</span><span class="comment">/* If a custom TRC_CFG_EXIT_CRITICAL_SECTION is defined it will override the default definition */</span></div>
<div class="line"><a id="l00803" name="l00803"></a><span class="lineno">  803</span><span class="preprocessor">#ifdef TRC_CFG_EXIT_CRITICAL_SECTION</span></div>
<div class="line"><a id="l00804" name="l00804"></a><span class="lineno">  804</span><span class="preprocessor">#undef TRACE_EXIT_CRITICAL_SECTION</span></div>
<div class="line"><a id="l00805" name="l00805"></a><span class="lineno">  805</span><span class="preprocessor">#define TRACE_EXIT_CRITICAL_SECTION() TRC_CFG_EXIT_CRITICAL_SECTION()</span></div>
<div class="line"><a id="l00806" name="l00806"></a><span class="lineno">  806</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00807" name="l00807"></a><span class="lineno">  807</span> </div>
<div class="line"><a id="l00808" name="l00808"></a><span class="lineno">  808</span><span class="preprocessor">#ifndef TRACE_ALLOC_CRITICAL_SECTION</span></div>
<div class="line"><a id="l00809" name="l00809"></a><span class="lineno">  809</span><span class="preprocessor">#define TRACE_ALLOC_CRITICAL_SECTION() TRC_KERNEL_PORT_ALLOC_CRITICAL_SECTION()</span></div>
<div class="line"><a id="l00810" name="l00810"></a><span class="lineno">  810</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00811" name="l00811"></a><span class="lineno">  811</span><span class="preprocessor">#ifndef TRACE_ENTER_CRITICAL_SECTION</span></div>
<div class="line"><a id="l00812" name="l00812"></a><span class="lineno">  812</span><span class="preprocessor">#define TRACE_ENTER_CRITICAL_SECTION() TRC_KERNEL_PORT_ENTER_CRITICAL_SECTION()</span></div>
<div class="line"><a id="l00813" name="l00813"></a><span class="lineno">  813</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00814" name="l00814"></a><span class="lineno">  814</span><span class="preprocessor">#ifndef TRACE_EXIT_CRITICAL_SECTION</span></div>
<div class="line"><a id="l00815" name="l00815"></a><span class="lineno">  815</span><span class="preprocessor">#define TRACE_EXIT_CRITICAL_SECTION() TRC_KERNEL_PORT_EXIT_CRITICAL_SECTION()</span></div>
<div class="line"><a id="l00816" name="l00816"></a><span class="lineno">  816</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00817" name="l00817"></a><span class="lineno">  817</span> </div>
<div class="line"><a id="l00818" name="l00818"></a><span class="lineno">  818</span><span class="preprocessor">#endif </span><span class="comment">/*TRC_HARDWARE_PORT_H*/</span><span class="preprocessor"></span></div>
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